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这是一个用VHDL语言编写的并口转串口程序，在altera开发系统下验证通过，运用于开发板与计算机之间的通信，源程序可以提供参考-This is a use of the VHDL language Parallel to Serial procedures, In altera development system under test passed, the development of applied between the panels and computer communicatio
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dsp5416与tl16c550实现并口转串口通信程序-dsp5416 with tl16c550 achieve Parallel to Serial Communication Program
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一个并行转串行的verilog源程序,可以讲12位并行数据转换为一个串行数据,A parallel to serial verilog source code you can transfer your parallel data to serial data.you have 12bits parallel data then you will have a serial data
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并入串出移位寄存器和8路并行输出串行移位寄存器的VHDL代码，经Quartus II 5.1验证可用,String into a shift register and 8-way parallel output serial shift register of the VHDL code, the Quartus II 5.1 can be used to verify
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并串转换器：将并行输入的信号以串行方式输出，这里要注意需先对时钟进行分频，用得到的低频信号控制时序，有利于观察结果（可以通过L灯观察结果）-And series converter: the input signal in parallel to serial output, where attention should be paid to the need to carry out first clock frequency, low-frequency signals received b
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This file contains the Parallel to Serial conversion. This is the top module where we can change the code. The other part of this file is Parallel to Serial controller i,e P2S_SM
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This file contains the state machine which has the control signals required for the parallel to serial conversion-This file contains the state machine which has the control signals required for the parallel to serial conversion....
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parallel to serial shift register
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parallel to serial experiment and string
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本文件是可以直接使用下载到FPGA里面使用，里面包含时钟分频电路，串并转换和并串转换电路，多通道信号加权的乘加电路等。-The document may download to FPGA chip to complete the clock divider,serial-to-parallel,parallel-to-serial,and multiple-add circuit for multiple channels weight calculation
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This project is "digital serial multiplier". this proh=ject is used to multiply the serial data with parallel data. the source code is writtenby using vhdl.
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parallel to serial data converter using VHDL
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this code is designed to perform parallel to serial operation it is very essential in every design
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该模块实现的是并串转换功能，经过仿真验证没有问题-This module is designed to implement parallel to serial conversion
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串口大并口的通讯proteus程序及keil asm工程-Large parallel proteus serial communication procedures and keil asm Engineering
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并口到串口的通讯 proteus及keil asm工程文件-Parallel to serial communications and keil asm project file proteus
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Parallel interface to serial interface -Parallel interface to serial interface
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基于VERILOG的并行转串行程序-Based on the parallel to serial procedures VERILOG
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verilog语言 12位串行数据传输转换为并行传输-12bit parallel to serial decoder and aynthesis result
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Verilog Module for 8-Bit Loadable Serial/Parallel-In Parallel-Out Shift Registers with Clock Enable and Asynchronous Clear
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