pku 2485 use the prim algorithm

利用译码程序在FPGA/CPLD中实现16进制数的译码显示.通过EDA原理图设计方法利用prim库中7448芯片进行7段译码显示-Using decode program FPGA/CPLD realized in hexadecimal number decoding display. Through the EDA principle diagram design method using the prim library 7448 chips for 7 period of decodin

这是一个构造最小生成树的Prim算法，是属于贪心算法的范畴。设G=(V,E)是连同带权图，V={1，2，3，...，n}。构造G的最小生成树。-This is a structure of Prim minimum spanning tree algorithm is a greedy algorithm category. Set G = (V, E) is, together with the weighted graph, V = (1,2,3 ,..., n). G of the min