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butterfly.rar
- 蝶形运算，可用于DCT变换，FFT变换的模块,Butterfly computation, can be used for DCT transform, FFT transform module
two_d_dct_serial
- Verilog codes for 2D Discrete Cosine Transform (DCT)
JPEG
- 本文首先介绍了静态图像压缩（JPEG）编码算法的基本原理、压缩的实现过程及其重要过程的离散余弦变换（DCT）算法的实现原理及软件实现的例程，其次着重介绍了压缩过程中的DCT、量化和编码三个重要步骤的实现原理。-This paper describes the static image compression (JPEG) coding algorithm is the basic principle of compression process of the implementation pro
DCT
- 用于视频图像编码的8×8DCT变换，可用于MPEG4.H263等VHDL编程-For video images encoded 8 × 8DCT transform, can be used to MPEG4.H263 such as VHDL Programming
dct-code
- 离散余弦变换的VHDL实现，不错的代码和方法-Discrete cosine transform VHDL realization of good code and methods
2DImageFilterByVHDL
- 用VHDL语言编程实现2维图像的滤波算法，简单精辟-VHDL programming language used to achieve 2-D image filtering algorithm, simple brilliant
jpeg.tar
- This project features a complete JPEG Hardware Compressor (standard Baseline DCT, JFIF header) with 2:1:1 subsampling, able to compress at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with resolution 352x288). Image resolution is no
dct2
- 这个是一个基于FPGA的数字图像的整数DCT变换程序，程序高性能地实现了2维DCT变换。-This is an FPGA-based digital image of the integer DCT transform process and procedures to achieve high-performance 2-D DCT transform.
projekt
- Dct 2d in vhdl + descr iption -Dct 2d in vhdl+ descr iption
main_dct
- verilog code for dct
xapp610
- Verilog code for 2D-DCT with detailed documentation.
two_d_dct_serial
- 二维DCT变换，采用查找表的方法实现算法，分别通过列变换，再通过行变换，通过加法器乘法器以及流水线技术得出更快的结果！-two-dimention DCTtransform,the algorithm was implemented by look up table,via row trasforming and colum trasforming respectively
dct
- 用vhdl语言来实现了dct离散余弦变换-With VHDL language to achieve the optimal discrete cosine transform
1DCT_VHDL
- VHDL Behavioral Model for 1D DCT operation Algorithm : Calculates the 1D DCT coefficients. DCT Points range from 8 to 32. There is double buffering at the input, to allow continuous usage of DCT engine.-VHDL Behavioral Model for 1D DCT operation
verilogdct
- dct实现verilog hdl的数字图像处理，源代码-dct achieve verilog hdl digital image processing, source code
Lab4b_24897141
- this is vhdl behavorial model of a dct chip at an algorithmic level
dctalgo
- vhdl coding for dct algorithm
addersubtractor10
- vhdl coding for adder subtractor used in dct
DCT2
- 2 维 DCT的VHDL实现以及 测试代码 ， -2-D DCT of the VHDL implementation and test code
dct
- 基于FPGA的图像压缩算法程序，自己写的，可以参考一下-FPGA-based image compression algorithm, write your own, you can refer to