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qam_64
- 64QAM调制,采用硬件语言verilog实现,其中调用了DDS的IP核-64QAM modulation, using language verilog hardware implementation, which is called the IP core of the DDS
dpd_v6_0_example_design
- xilink DPD V6.0 IP Core design example-xilink DPD V6.0 IP Core design example
ipfiltersingletb
- 此程序是用vhdl语言编写的多相滤波器。使用了ip核。并且配有测试程序，是正确的。-This program is a polyphase filter vhdl language. Use the ip core. And with a test program, is correct.