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fir
- 做作业的时候用VERILOG编写的FIR滤波器程序，希望对大家有用-Homework time FIR filter with VERILOG written procedures, we want to be useful
8_oeder_signed_parellel_DA_FIR
- 本程序使用Verilog编写的程序。 本例是1个8阶对称系数的FIR滤波器，采用并行分布式算法。输入位宽为12位，输入是有符号的，即有正有负。-it s a program with Verilog
FIR-verilog
- FIR filter verilog code
CIC_fir-Verilog
- 本程序是一个CIC滤波器设计，有助于初学者对滤波器设计设计有一个初步的了解-CIC fir
code
- 用Verilog写的采用LSM算法的自适应性FIR滤波器，有testbench和主体代码，亲测可用-Written using Verilog LSM algorithm using adaptive FIR filters, and the body has testbench code, pro-test available
Digital-signal-process-of-PFGA
- 数字信号处理 包括滤波器IIR FIR CORDIC的FPGA实现 资料中是VHDL语言 相应的配套包verilog程序-Digital signal processing includes a filter IIR FIR CORDIC on FPGA is VHDL language data corresponding supporting package verilog program
FIR
- This is verilog code for FIR Filter with testbench availble.
FIR_16bits_LP
- This is a verilog code for Low pass FIR Filter which inputs 16bit wide.
verilog的fir滤波器
- 实测可用，个人实现的fir滤波器，已经通过了modelsim仿真测试，