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uartdesign
- 完成VHDL实现UART准确无误码传输.
mmu_uart
- uart RS232 VHDL Code
btm_communication
- 自己项目中用到的verilog UART程序。-Their own projects verilog UART procedure used.
UART
- A badic controller for the UART. It incorporates a -- transmit and receive FIFO (from Max+Plus II s MegaWizard -- plug-in manager). Note that no checking is done to see -- whether the FIFOs are overflowing or not. This strictly -- handles the
uart
- i like verilog VHDL and system Verilog
uart_proj
- uart serial vhdl, sender and transmitter for full speed 115200 bods
uart16750_latest[1].tar
- uart 16750 core discripe with VHDL language
UART-master
- descripcion de cosas importantes, en vhdl tl548
Uart_Tx
- Uart Transmitter with VHDL
uart
- Uart comunication in vhdl