The concept of the Altera Nios II embedded processor implementation inside Field Programmable Gate Array [FPGA] of the CCD camera for the “Pi of the Sky” experiment is presented. The digital board of the CCD camera, its most important components, cur

提出一种面阵CCD的驱动和数据采集系统的设计方案，采用了nios和cpld的组合。-Presents a planar array CCD drive and data acquisition system design, using a combination of nios and cpld

期刊论文基于VHDL线阵CCD驱动设计-Journal articles based on VHDL linear CCD driver design

线阵CCD图像传感器驱动电路的设计 包含VHDL代码-the liner CCD sensor driving circuit include the VHDL code