搜索资源列表
Altera-Cyclone-II
- \ALTERA CPLD\Protel99库_ALTERA\Altera Cyclone II\Altera Cyclone II(PCB/sch.lib)-ALTERA CPLD\Protel99库_ALTERA\Altera Cyclone II\Altera Cyclone II(PCB/sch.lib)
s3esk_cpld_design
- Spartan-3E板卡XC2C64A CPLD 的代码-the XC2C64A CPLD on the Spartan-3E Starter Kit boards
IntroductiontoCPLDandFPGADesign
- Introduction to CPLD and FPGA Design
source
- source with cpld prepared after the start of more documents, please use patience. Thank you, the generous support!
vhdprograme
- 用vhdl做得CPLD静态两位数码管扫描 显示“10”两位数码管公用段选-CPLD with VHDL done two static scan digital tube displays
jiaowwj
- 基于CPLD的交通灯设计,自己做的大家帮忙看看行不-CPLD-based design of traffic lights, we help ourselves do not look at the line
02_CPLDxitong
- cpld系统 EWB Quartus2编译 电子综合设计试验箱程序-CPLD system compiler EWB Quartus2 chamber electronic integrated design process
an497_CN
- 利用MAX II CPLD 实现LCD 控制器-MAX II CPLD realization of the use of LCD Controller
Verilog_PPT
- 东南大学Verilog讲义 Verilog 语言作为CPLD和FPGA开发语言,比VHDL相比有更多的优势.-Southeast University Verilog notes Verilog language as CPLD and FPGA development language than VHDL have more advantages in comparison.
CPLD_zhengxuanbofashengqi
- 能完全模拟DDS芯片的工作，在CPLD的输出引脚后接上相应的D/A转换芯片并接上低通滤波器，将得到非常好的正旋波-To fully simulate the work of DDS chip in after the CPLD output pin connected to the corresponding D/A conversion chip and connected to low-pass filter, will be a very good spin wave is
51andCPLD
- 一个基于51系列单片机和CPLD结合完成的项目-Based on 51 Series MCU and CPLD integrated projects
PCI9054RDK-LITE_HRM_With_Schematic_19Jan06
- 9054 RDK Lite Schematic
PLD_FPGA_development_software
- 这个文档介绍了目前绝大部分的FPGA/CPLD设计软件，并对每个软件做了简要的介绍。大家在学习前看看，对于设计软件的选择将有极大帮助。-This document describes the current most of the FPGA/CPLD design software, and each software to do a brief introduction. Look at everyone before the study, the design software will g
EPM70_www.ic37.com
- 一些非常用用的cpld芯片的资料，没事可以看看，很好的，尤其是初学者-good
BasedonCPLDFPGAsuchasthefrequencyaccuracyofthedesi
- 基于CPLD／FPGA的可编程逻辑器件，借助单片机AT89C51；利用标准频率50～100MHz的周期信号实现系统计数的等精度测量技术。同时采用闸门测量技术完成脉宽,占空比的测量。-Based on CPLD/FPGA programmable logic devices, with single-chip microcomputer AT89C51 using a standard 50 ~ 100MHz frequency of the periodic signal, such as c
CPLDVHDL.ZIP
- 基于CPLD和VHDL的电子密码锁设计，毕业论文的PDF格式，可以参考一下-Based on CPLD and VHDL design of electronic locks, Thesis of the PDF format, you can refer to
VHDL_FPGA_FILTER
- 用VHDL语言设计基于FPGA器件的高采样率FIR滤波器,基于VHDL与CPLD器件的FIR数字滤波器的设计-Design using VHDL language FPGA devices based on high sampling rate FIR filter, based on VHDL and CPLD devices, the design of FIR digital filter
bb
- 基于CPLD数字密码锁的设计 实验报告 所有都有 大家参考-CPLD-based design of digital locks all have a test report reference
content
- 针对基于cpld的出租车计费系统的设计，提供设计方案和思想，以及步骤参考- supply the content about engineering
MX7541
- 摘要：美国美信公司生产的MX7541系列器件是一种12位并行高速D/A转换器,此芯片可方便地应用于精密仪器的输出控制系统中。文中介绍了该芯片的基本参数和主要特性,给出了MAX7541与单片机和CPLD连接的具体应用电路。-Abstract: The USA and the United States produced a letter MX7541 Series 12 devices is a parallel high-speed D/A converter, the chip can be