搜索资源列表
Altera-Cyclone-III
- \ALTERA CPLD\Protel99库_ALTERA\Altera Cyclone II\Altera Cyclone IiI(sch).lib
Altera-Cyclone1
- ALTERA CPLD\Protel99库_ALTERA\Altera Cyclone II\Altera Cyclone1(PCB/sch.lib)
Altera-EPC-Configuration-Device
- ALTERA CPLD\Protel99库_ALTERA\Altera Cyclone II\Configuration Device(PCB/sch.lib)
Altera-EPCS-Configuration-Device
- ALTERA CPLD\Protel99库_ALTERA\Altera Cyclone II\Configuration Device2(PCB/sch.lib)
51USB
- USB51开发板的原理图和实验指导。这是一个综合了51单片机和USB及CPLD综合开发板。-The USB51 development board principle chart and experiment guidance. This is a comprehensive 51 SCM and USB and CPLD comprehensive development board.
the-experience-of-fpga
- 很好的学习资料，主要讲解了一些FPGA/CPLD的设计经验，比较适合初学者进行学习。-A very good learning materials, mainly on the FPGA/CPLD design experience, more suitable for beginners to learn.
CPLDofUSB
- 基于CPLD的USB2．0控制系统接口电路的设计与实现，包括原理、方案和硬件设计-Based on the the CPLD USB2.0 control system interface circuit design and implementation, including the principles, programs and hardware design
1V1D-Optical-transceiver
- CPLD芯片1路光端机原理图,附免责申明，本文仅为从百度文库转载而来，仅供参考学习，并向文档最先上传者无私奉献精神致敬-CPLD chip Optical schematic attached Disclaimer affirm that this article only come from Baidu library reproduced only for reference to the document was first uploaded the spirit of selfless
EPM570yuanlitu
- CPLD EMP570的最小系统，可作为学习EDA的核心板-The CPLD EMP570 the minimum system can be used as learning of the EDA core board
LCD128
- cpld驱动LCD12864液晶显示，显示字符，汉字-cpld LCD
CPLD_18b20_uart
- 温度传感器采集数据给cpld，然后由串口上传到上位机；编程语言是verilog；-Temperature sensor collected data to the the cpld, then uploaded to the host computer by serial programming language verilog
CoolRunnerPXPLA3PCPLDPArchitecturePOverview[1].ra
- This document describes the CoolRunner™ XPLA3 CPLD architecture.-This document describes the CoolRunner™ XPLA3 CPLD architecture.
FPGA-Muti-clock
- FPGA 或者CPLD多时钟设计指南，如何使得多时钟设计时候减少抖动，噪音等-FPGA or CPLD clock design guide, how to make multi-clock design time to reduce jitter, noise, etc.
CPLD
- 本文介绍了利用计算机ISA、PCI 总线和打印机接口设计密码电路-The paper proposes a password circuit that by using computer ISA and PCI bus andprinter interface.
MYDM368_CORE
- 本人做的DM368的核心板。没有用上CPLD器件。可以直截用ALLEGRO16.5打开。-I do DM368 core board. No access to CPLD devices. Can be straightforward with ALLEGRO16.5 Open.
GalDevicesApplicationDesign
- 手把手教你学GAL器件应用设计 在深圳，一位 CPLD(可编程逻辑器件)设计人员的工资是月薪 1万元，而且还万金 难求。现在 FPGA／CPLD／ARM等芯片设计技术已越来越多地应用在产品开发中，本文 就是您通往芯片设计殿堂的起点。 -The GAL devices application design taught you to learn
VHDL-for-beginners
- VHDL for beginners. This file contain a few pdf s about distinguishing characteristic. Needed knowledge about VHDL in FPGA/CPLD.-VHDL for beginners. This file contain a few pdf s about distinguishing characteristic. Needed knowledge about VHDL in FP
EDA
- 基于 CPLD/FPGA用原理图和VHDL语言混合设计实现了一多功能通用分频器。-CPLD/FPGA-based mixed schematic and VHDL language design and implementation of a multi-function universal divider.
DC-DC
- /功 能：1.实现与CPLD的通信,从而控制PWM的占空比. 2.实现LCD显示相关信息. // 3.实现对键盘按键的判断和确定相应的操作. 4.实现对电压电流的检测. // 5.实现过载保护功能,电流过大时,切断PWM输出,当排除过流故障后,自动恢复供电 // 6.实现用PID算法跟踪电压,实现稳压输出-/ Function: 1. Achieve communication with the CPLD to control the PWM duty cycle.
run
- 利用vhdl 寫出讓CPLD 跑馬燈的型式 內容為:I love U-Marquee CPLD using vhdl write to the type content: I love U