搜索资源列表
Verilog_PPT
- 东南大学Verilog讲义 Verilog 语言作为CPLD和FPGA开发语言,比VHDL相比有更多的优势.-Southeast University Verilog notes Verilog language as CPLD and FPGA development language than VHDL have more advantages in comparison.
PLD_FPGA_development_software
- 这个文档介绍了目前绝大部分的FPGA/CPLD设计软件，并对每个软件做了简要的介绍。大家在学习前看看，对于设计软件的选择将有极大帮助。-This document describes the current most of the FPGA/CPLD design software, and each software to do a brief introduction. Look at everyone before the study, the design software will g
VHDL_FPGA_FILTER
- 用VHDL语言设计基于FPGA器件的高采样率FIR滤波器,基于VHDL与CPLD器件的FIR数字滤波器的设计-Design using VHDL language FPGA devices based on high sampling rate FIR filter, based on VHDL and CPLD devices, the design of FIR digital filter
QuartusIIinfo
- QuartusII警告信息大解析，在对ALTERA的FPGA/CPLD编程时可以拿来参考。-QuartusII warning large resolution, in the ALTERA' s FPGA/CPLD programming can all be used for reference.
VHDL_Notes
- Notes ofn the VHDL. The VHDL (VHSIC Hardware Descr iptive language) is used for the design of ASIC, FPGA and CPLD integrated circuits-Notes ofn the VHDL. The VHDL (VHSIC Hardware Descr iptive language) is used for the design of ASIC, FPGA and CPLD i
FSM-design
- An overview of Finite State Machines. FSMs are an important aspect of FPGA and CPLD desig using VHDL and Verilog-An overview of Finite State Machines. FSMs are an important aspect of FPGA and CPLD desig using VHDL and Verilog
04z127
- ，以可编程逻辑阵列CPLD进行逻辑控制，采用2片现场可 编程门阵列FPGA分别作为图像预处理和2片DSP之间的通信， 实现了实时的基于灰度变换的图像目标识别处理-To programmable logic array CPLD to logic control, with two each field programmable gate array FPGA image preprocessing and communication between two DSP to achieve
10-jinzhi-counter
- 10进制计数器 每计数十次有一个进位，是vhdl编程的基础程序，应用于fpga cpld可编程逻辑器件-Total scores of 10 binary counter has a per carry, is the basis for vhdl programming procedures used in programmable logic devices fpga cpld
15-jinzhi-counter
- 15进制计数器 每计数十五次有一个进位，是vhdl编程的基础程序，应用于fpga cpld可编程逻辑器件-Fifth decimal counter 15 counts each have a carry, is the basis for vhdl programming procedures, programmable logic devices used in fpga cpld
GalDevicesApplicationDesign
- 手把手教你学GAL器件应用设计 在深圳，一位 CPLD(可编程逻辑器件)设计人员的工资是月薪 1万元，而且还万金 难求。现在 FPGA／CPLD／ARM等芯片设计技术已越来越多地应用在产品开发中，本文 就是您通往芯片设计殿堂的起点。 -The GAL devices application design taught you to learn
VHDL-for-beginners
- VHDL for beginners. This file contain a few pdf s about distinguishing characteristic. Needed knowledge about VHDL in FPGA/CPLD.-VHDL for beginners. This file contain a few pdf s about distinguishing characteristic. Needed knowledge about VHDL in FP
Altera-FPGA_CPLDdesign
- altera的cpld和fpga基础知识学习，对初学者很有帮助。-altera cpld and fpga basics of learning, useful for beginners.
Embedded-Hardware-Training.pdf
- 本书内容非常丰富，共分为3部分。第一部分：常用电路及元件。第二部分：PROTEL DXP.第三部分：FPGA/CPLD技术。-This book is very rich, is divided into three parts. Part I: Common circuits and components. The second part:. PROTEL DXP third part: FPGA/CPLD technology.
SVPWM_FPGA_ContainSourceCode
- 广东工业大学硕士论文《SVPWM算法优化及其FPGA/CPLD实现》，在详细分析经典SVPWM算法基础上，提出一种优化算法，并在FPGA上实现。论文附录包含VHDL源码。-Guangdong University Thesis " SVPWM algorithm to optimize its FPGA/CPLD realization" in the detailed analysis of the classical SVPWM algorithm is propose
fpga-cpld
- 数码管的显示，跑马灯-Digital tube display, marquees。。。。。。。。。。
Experience-sharing-FPGAaCPLD
- FPGA&CPLD数字电路设计经验分享，非常值得一看-Experience sharing, FPGA&CPLD digital circuit design is very worth a look
CPLDFPGA
- CPLD的详细教程，可以作为FPGA和CPLD的入门学习使用书-Lt /RTI &