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pllverilog 完成pll锁相环的设计
- 基于FPGA的程序编写，完成pll锁相环的设计，实验证明次程序是完整的-FPGA-based programming, complete pll PLL design, experiments show that second program is complete
Aidio
- 摘要：应用CXA1019S芯片完成接收机混频、中放、解调等的设计，并用芯片BU2614以PLL 频率合成的方法产生稳定的本振和控制输入调谐回路的谐振频率，从而实现电调谐。单片机采用 MCS-51系列对频率合成器BU2614进行控制，加上键盘、显示和存储器电路，可实现多种程控搜 索、电台存储等功能。-Abstract: The complete receiver chip CXA1019S mixer, amplifier, demodulator, such as design, a
smart
- 智能 全数字锁相环的设计 -smart all digital PLL design , very good
PLL
- Practical Phase-Locked Loop Design.rar
pll
- this design tell how do a good PLL design
pll_manual
- 使用PLL design assistant程序进行PLL设计-PLL design using the PLL design assistant program
a
- PLL性能,仿真,设计handbook,总结了常用的PLL结构和性能,对设计PLL很有帮助-PLL performance,simulation,design handbook
PLL(pdf)
- 锁相环的设计方法介绍（PLL），可作为设计的参考。-Design method for PLL (PLL), can be used as a reference design.
zhuomian
- 关于锁相环的设计，以及压控振荡器的设计，对于射频研究人员来说是一篇较好的资料。-about pll design
PSIMbasedsimulationmodelofthedesignofPLLPLL
- 基于PSIM的锁相环_PLL_仿真模型设计PSIM-based simulation model of the design of PLL _PLL_-PSIM-based simulation model of the design of PLL _PLL_
A-fast-lock-PLL-charge-pump-design
- 一种快速锁定电荷泵锁相环的设计，采用ADS进行仿真-A fast lock PLL charge pump design
Hybrid_PLL_Design_Tutorial_Yiar_Linn
- Hybrid PLL design techniques
PLL-Hardware-Design
- systemiew的功能示例，主要讲述在32位条件下有systemview进行PLL硬件设计和软件仿真的方法-PLL Hardware Design and Software Simulation Using the 32-bit of SystemView by ELANIX
PLL-Hardware-Design
- systemiew的功能示例，主要讲述在32位条件下有systemview进行PLL硬件设计和软件仿真的方法-PLL Hardware Design and Software Simulation Using the 32-bit of SystemView by ELANIX
Phase-Locked-Loop-FAQ
- 关于锁相环设计经常遇到的一些问题的官方解答.为设计者提供一些参考.-PLL design on some of the problems often encountered in the official answer. Provide some reference for the designer.
setup_pll_design
- PLL设计仿真，验证工具，这是一个很不错的软件-PLL design simulation
classic_PLL
- 非常经典的PLL设计讲义，清华大学重点实验室精华总结-PLL design PPT
Qinghua-University-PLL-Lecture
- PLL的设计与频率相应 清华大学的讲义 基于低通滤波器的设计绘制开环增益波特图-PLL DESIGN AND FREQUENCY GENERATION Draw open-loop gain Bode plot based on LPF design
digital-PLL
- 收集的关于数字锁相环的理论模型和分析讨论，适用于FPGA的数字电路设计。-Theoretical models and analysis and discussion about digital PLL collected for FPGA-based digital circuit design.
PLL-(2)
- PLL设计关键基础及基本参数确定方法，包含锁相环的基本原理，如何配置等等关键问题手册-PLL design critical infrastructure and basic parameters determining method, it contains the basic principles of PLL, how to configure manual key issues, etc.