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DDR3-SDRAM-controller
- My package named design DDR3 Synchronous Data Random Access Memory by verilog.The memory controller is a digital circuit which manages the flow of data going to and from the computer s main memory.
DDR3_TheBasics.pdf.tar
- DR3 SDRAM stands for Double Data Rate 3 Synchronous Dynamic Random Access Memory-DR3 SDRAM stands for Double Data Rate 3 Synchronous Dynamic Random Access Memory
sdram_datasheet
- 关于 SDRAM 学习资料文档，希望对你有所帮助-about SDRAM study file ，hope will help you
realization-of-VGA-display-with-FPGA
- <用FPGA实现VGA显示> 摘要：本文介绍了一种用FPGA结合DDR SDRAM和单片机，在VGA显示器上显示字符、图形信息的方法。-The realization of VGA display with FPGA
sTM32应用笔记
- The STM32F429 Discovery helps you to discover the high-performance microcontrollers of the STM32 F4 series and to develop your applications easily. It offers everything required for beginners and experienced users to get started quickly. Based on
Zynq-Mini-ITX-Rev-E
- Zynq Mini-ITX 单芯片可编程SOC(ARM+FPGA)开发板电路原理图 -Zynq Mini-ITX Development Board Schematics the Zynq Mini-ITX development board features 2 GB DDR3 SDRAM, PCIe Gen2 x16 Root Complex slot (x4 electrical), SATA-III interface, SFP interface, QSPI Flash me
DDR3-User-Guide
- 在DDR3内存控制器一起使用JESD79-3C符合标准SDRAM器件接口。内存类型，如DDR1 SDRAM，DDR2 SDRAM，SDR SDRAM，SBSRAM和异步不支持的回忆。在DDR3内存控制器，SDRAM，可用于程序和数据存储。梯形失真校正设备有一个实例。-Use JESD79-3C standard SDRAM DDR3 memory controller interface devices together. Memory types, such as DDR1 SDRAM, DD
1cs_32m
- 一种SDRAM控制器 里面含说明文件非常有用-for SDRAM cutorl
mt48lc1m16a1
- sdram - mt48lc1m16a1 modelsim仿真模型-sdram- mt48lc1m16a1 modelsim simulation model
ppbqw
- 一个师兄的毕设，实现用SDRAM运行nios，同时用SRAM保存摄像头数据，基于互功率谱的时延估计。- A complete set of brothers, Implemented with SDRAM run nios, while saving camera data SRAM, Based on the time delay estimation of power spectrum.
mr842
- 包含CV、CA、Single、当前、恒转弯速率、转弯模型，语音信号的采集与处理，数字信号处理课设，实现用SDRAM运行nios，同时用SRAM保存摄像头数据。- It contains CV, CA, Single, current, constant turn rate, turning model, Acquisition and Processing of the speech signal, digital signal processing class-based, Implement
2008
- 汽车课设货车Matlab驱动力图程序，实现用SDRAM运行nios，同时用SRAM保存摄像头数据，用于建立主成分分析模型。- Car class-based truck driver trying to Matlab program, Implemented with SDRAM run nios, while saving camera data SRAM, Principal component analysis model for establishing.
bg317
- 实现用SDRAM运行nios，同时用SRAM保存摄像头数据，这个有中文注释，看得明白，单径或多径瑞利衰落信道仿真。- Implemented with SDRAM run nios, while saving camera data SRAM, The Chinese have a comment, understand it, Single path or multipath Rayleigh fading channel simulation.
snxys
- 脉冲响应的相关分析算法并检验，二维声子晶体FDTD方法计算禁带宽度的例子,实现用SDRAM运行nios，同时用SRAM保存摄像头数据。- Related impulse response analysis algorithm and inspection, Dimensional phononic crystals FDTD method calculation examples band gap, Implemented with SDRAM run nios, while saving ca
lou_v61
- 实现用SDRAM运行nios，同时用SRAM保存摄像头数据，代码里有很完整的注释和解释，可实现对二维数据的聚类。- Implemented with SDRAM run nios, while saving camera data SRAM, Code, there are very complete notes and explanations Can realize the two-dimensional data clustering.
neng_qw24
- 电力系统暂态稳定程序，可以进行暂态稳定计算,实现用SDRAM运行nios，同时用SRAM保存摄像头数据，用于建立主成分分析模型。- Power System Transient Stability Program, can be transient stability, Implemented with SDRAM run nios, while saving camera data SRAM, Principal component analysis model for establishin
xkgkw
- 实现用SDRAM运行nios，同时用SRAM保存摄像头数据，cordic算法的matlab仿真，经典的灰度共生矩阵纹理计算方法。- Implemented with SDRAM run nios, while saving camera data SRAM, cordic matlab simulation algorithm, Classic GLCM texture calculation method.
vw553
- 有循环检测，周期性检测，实现用SDRAM运行nios，同时用SRAM保存摄像头数据，模拟数据分析处理的过程。- There are cycle detection, periodic testing, Implemented with SDRAM run nios, while saving camera data SRAM, Analog data analysis processing.
soujou-V7.6
- Using wavelet denoising thought, There Wavelet Analysis Blind Signal Processing, Implemented with SDRAM run nios, while saving camera data SRAM.
U-Boot启动第二阶段代码分析
- U-Boot第一阶段的启动流程。(nandflash启动，把nand的4k代码考到sram中，因为nand没址线，不能映射到内存，所以通过sram进行过度，sram中4k代码把整个uboot拷贝到sdram上，初始化好堆栈，为c语言提供条件，进入uboot的第二阶段！ )这个阶段主要是初始化硬件设备，为加载U-Boot的第二阶段代码准备RAM空间最后跳转到lib_arm/board.c中start_armboot函数，这是第二阶段的入口点。(U-Boot first phase of the s