搜索资源列表
StatediagraTutorial
- state diagram design in xilinx
Xilinx_Wireless
- Xilinx公司的无线解决方案，对从业者是个很好的参考。-Wireless solutions from Xilinx, very helpful for the telecommunication engineers.
Chapter16
- Video compression using FPGA in XILINX
Xilinx_Speedway_EDK11_2
- TRANING PART 2 Xilinx EDK11_2- TRANING PART 2 Xilinx EDK11_2
PicoBlaze_DAC_control_rev2
- Xilinx PicoBlaze数模转换手册-PicoBlaze_DAC_control_rev2
Sum
- FPGA with VHDL sum example in Xilinx
start
- xilinx fpga initialization
Combinational_Divider_in_FPGA
- Three VHDL codes for combinational divider with implementation results for Xilinx Spartan FPGAs-Three VHDL codes for combinational divider with implementation results for Xilinx Spartan FPGAs
ppl
- 锁相电路是相位锁定环(Phase Locked Loop)的简称，主要由鉴相器、环路滤波、压控振荡器成 。主要是要掌握LabVIEW图形化编程特点，-PLL circuit is phase-locked loop (Phase Locked Loop) for short, mainly by the phase detector, loop filter, VCO into. Mainly to grasp the features of LabVIEW graphical programm
GeneratingFPGA-AcceleratedDFTLibraries
- 关于DFT的文章，应用FPGA实现傅立叶变换。-Abstract—We present a domain-specific approach to generate high-performance hardware-software partitioned implementations of the discrete Fourier transform (DFT). The partitioning strategy is a heuristic based on the DFT
fpga
- 十分钟学会Xilinx FPGA 设计，是中文版的，比较详细，很容易上手，供大家学习-10 minutes Society of Xilinx FPGA design, is the Chinese version, more detailed, it is easy to use, for everybody to learn ~ ~ ~
plsproject
- Mouse to Spartan 3, xilinx 1.1 ISE
XilinxHDL
- Xilinx HDL艺术技巧，对于设计的优化非常实用-Xilinx HDL art technique, for design of excellent turn very practical
XilinxFoundation
- 用Xilinx+Foundation平台进行系统级设计-Use Xilinx+Foundation the terrace carry on system class design
dd
- 设计的随机数发生器可产生两个随机数，由一开关（RIN）进行控制，RIN为1时随机数发生器被清除，RIN为0时随机数发生器将产生1-6的两个随机数，可由LED数码管显示，显示的方式可由设计者自行设计，既可以选择数码管中的任两个LED显示随机数，也可让四位LED同时显示一个随机数（按一定的时间跳转显示）。根据给定的材料完成上述系统的设计，用Xilinx ise完成功能的设计与仿真，并最终下载到目标板XILINX SPARTAN-3 Starter Board上进行验证实现。-The random n
Xilinx_ISE
- 赛灵思spartan3e配套全程开发软件-Throughout the development of software supporting Xilinx spartan3e
Hyperlynx-7-Xilinx-Design-Kita-Hspice-Integration
- hyperlynx and fpga training
1
- Xilinx官方的6个EDK实验(中文版)-Xilinx EDK SIX EXPERIMENTS
420-hw
- chip gesign using altera and xilinx.
xilinx_altera
- XILINX 与 ALTERA 两家FPGA的比较,其中涉及了资源\速度\型号\性能等,比较时编译软件都采取了较多设置,可以保证正确性.-XILINX and ALTERA FPGA comparison of two, which involves a resource \ speed \ models \ performance, etc., when compared to compiled software have taken more settings, you can guaran