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TheResearchAndIPDesignOfSMBusBasedSmartBattery
- 本文研究了SMBus 规范，介绍了典型的基于片上系统（SoC）设计的知识产权核（IP）实现，采用自顶向下 (Top-down)的集成电路设计方法完成了设计，并架构了基于总线功能模型(BFM)的验证平台 完成功能仿真，顺利完成了逻辑综合和时序仿真。FPGA 验证和投片后测试均表明设计具有 良好的性能。-This paper studies the SMBus specification, based on the introduction of the typical system
led_zfsj
- 现场可编程门阵列( FPGA) 是一种可编程逻辑器件, 它具有丰富的I/O 口及内部资源, 编程和修改极为方便, 并且易于扩展和维护, 简化电子电路的设计。本系统采用Altera 公司的FLEX10K作为核心器件, 结合VHDL程序, 实现了对LED 点阵显示字符的控制。-Field programmable gate array (FPGA) is a programmable logic device, which has a wealth of I/O port and internal
5PG
- Design of High-Performance Low-Power Carry Select Adder using Dual Transition Skewed Logic (DTSL)I
DesignCompilerPPT
- 用design compiler对verilog hdl的程序进行逻辑综合最后生成门级网表即用门生成的电路图。-Verilog hdl with design compiler of the logic synthesis procedure generates the final gate-level netlist that is generated with the door circuit.
SP-SCE
- 业务开发环境，根据用户需求生成新的业务逻辑。简单的来说就是用户（SP，企业）设计所需业务的工具 -Business development environment, according to user needs to generate new business logic. It is a simple user (SP, corporate) design the necessary business tools
GP-IB-Code
- 本讲座分八讲：GP-IB标准接口逻辑设计、自动测试系统的组建、标准接口使用要领、接口功能配置和功能子集、GP-IB自动测试系统开发实例、GP-IB系统软件简介。是设计开发GP-IB系统的必备资料-The eight lectures about: GP-IB interface to standard logic design, automatic test system set up, the standard interface essentials, configuration and f
DDS
- 频率切换时间短、工作频率范围宽、频率分辨率高、相位变化连续和容易对输出信号实现调制等。一些公司先后推出了各种各样的DDS专用芯片，这些DDS专用芯片为电路设计提供了很大方便，但是并不能满足所有要求。例如，在实现调频及调幅等复杂功能时，利用现有专用芯片就会很不方便。利用可编程逻辑器件或现场可编程门阵列实现具有很大的灵活性，能够很好地满足电路设计要求。 -Frequency switching time is short, the operating frequency range, high f
logic
- 夏宇文数字逻辑设计文档，很有帮助，适合初学者，-Xia Yuwen digital logic design documents
KSZ8342_Data_Sheet
- IP电话专用芯片 The Micrel KSZ8342Q 文档资料。-The Micrel KSZ8342Q Analog Telephone Adapter (ATA) supplies a complete solution for enterprise and residential environments, converting analog signals from a traditional telephone of fax machine for transmission
ADvances-in-Digital-Optical-Computing
- A current approach in applying photonics to digital computing is to interconnect arrays of optical logic gates in free space with regular patterns, such as perfect shuffles or crossovers. Circuit depths and breadths are only slightly worse than w
Verilog
- 夏宇闻数字逻辑设计，非常好的VHDL学习资料，不多说了-Xia Wen digital logic design, VHDL very good learning materials, not much to say