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128×16ram
- VHDL程序设计的RAM存储器，双端口，128×16比特
基于FPGA的128细分的步进电机驱动程序
- 基于FPGA的128细分的步进电机驱动程序
aes
- verilog实现的AES-128加解密程序，FPGA验证通过-verilog implementation of AES-128 encryption and decryption process, FPGA verification through
aes_inv_cipher_top
- aes ip core, 128 bits
wannianli
- 采用VHDL语言编写的万年历程序，可在液晶上显示！-Using VHDL language calendar procedures, can be displayed on the LCD!
240128
- 240128液晶驱动程序，本演示程序适用于SMG240128A液晶显示模块与MCS51系列单片机采用MCS51模拟口线的 //硬件连线方式。 // 本演示程序包括T6963C兼容芯片的MCS51模拟口线方式子程序集,T6963C兼容芯片的240128 //液晶显示模块的基本子程序,以及SMG240128系列标准图形点阵型液晶显示的基本演示子程序. // 本演示的内容为,在240列X128行的点阵液晶显示屏上清屏,写数据,读写数据,全屏显示.-240,128 LCD drivers
pn127
- 这是个128位的串行伪随机码发生器，还可以进一步扩充-128 This is a serial pseudo-random code generator, can be further expanded
Lcd-12864
- 这是一个用ALTER公司FPGA控制外部128×64液晶的程序，很实用，希望大家下载！-This is a company with FPGA control ALTER external 128 × 64 LCD procedures, it is useful, I hope you download!
HD61202-12864
- 128x64--- --- ----液晶显示例程.rar-128x64---------------- LCD routines. Rar
aes_crypto_core_latest.tar
- Consecutive AES core Descr iption of project.. Features - AES encoder - 128/192/256 bit - AES decoder - 128/192/256 bit Status - Key Expansion added - Encoder added - Decoder added - Documentation added
RAM
- 用VHDL编写一个字长16位，容量128B的RAM控制实现程序，并进行设计综合和功能模拟 。含源程序，及实验要求。适合初学者学习使用。-VHDL prepared with a 16-bit word length, 128B of the RAM capacity to achieve process control and design of analog integrated and functional. Containing source code, and experimental
12864
- 基于VHDL语言，控制液晶12864显示的源程序，非常好用。-Based on the VHDL language, control of liquid crystal display source code 12864, very easy to use.
lcd_driver
- 用FPGA控制12864液晶输出时钟信息 很好 可以根据自己的需要更改 -12864 LCD control with FPGA clock output information can be very good according to their need to change the
DM10_KX8051_LCD128X64_C5T
- FPGA中嵌入8051的核 并且实现控制128*64的液晶显示-FPGA embedded in 8051 and to achieve control of the nuclear 128* 64 LCD
aes
- 高级加密标准AES的FPGA实现，支持128，256密钥长度格式-Advanced Encryption Standard AES, FPGA implementation to support 128,256 key length format
aes_thesis_v1.0
- AES VERILOG CODE 128 192 32DES比較-AES VERILOG CODE 128 192 32DES Comparison
AES_128
- 128 bit Advanced Encryption Standard
convolution_calculator_4_bits
- convolution is important and is widely used in digital signal processing.For example, in LTI system. Input two sequences of 8-bit 2 s complement signed numbers with length 2~8. the input values range is -128~127.
LIP1611CORE_AES128_SEC_UWB
- AES 128 Synthesisable RTL code
Image
- it is a short program for reading the data of 128*64 lcd to find a fire point