Xilinx公司诸多型号开发版中的一个模块，能够实现1到16次倍频和分频等功能。使用时现在ISE集成开发环境下利用VHDL进行例化。本文档为个人学习总结-Xilinx, a number of models developed version of a module, be able to achieve 1-16 times multiplier and divider functions. ISE now use integrated development environment for

dcm倍频例程及其用法。包含完整的dcm工程文件。具体代码内容请下载查看-dcm multiplier routines and their usage. Dcm file contains the complete works. Please see the specific code download

调用ISE010.1的IP核DCM来实现频率倍增，本程序实现的是50MHz到75MHz的倍增，开发者可以根据DCM的参数设置实现不同频率的倍增-Call ISE010.1 IP core DCM to achieve frequency doubling, the program is 50MHz to 75MHz multiplication, developers can implement different parameter settings of DCM frequency mult

使用Verilog语言编写源代码.调用一些基本的IP核，如DCM模块、DDS模块ChipScope模块、乘法器模块等来实现调制.最后通过编程并利用FPGA板子实现AM、DBS、SSB的调制。-Using Verilog language source code. Invoke some basic IP cores, such as DCM module, DDS module ChipScope modules, multiplier module to achieve modulation.