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  1. How

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  2. 如何改良USB接口的EMI和ESD设计,USB的众多便利使设计师能将该总线用于许多应用-How to improve the USB interface of EMI and ESD design, USB facilitate many of the bus so that designers can be used in many applications
  3. 所属分类:USB develop

    • 发布日期:2017-04-26
    • 文件大小:80659
    • 提供者:hu
  1. aa

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  2. 如何改良USB接口的EMI和ESD设计。时下流行的USB2.0接口具有高达480Mbps的传输速率,并与传输速率为12Mbps的全速USB1.1和传输速率为1.5Mbps的低速USB1.0完全兼容。这使得数字图像器、扫描仪、视频会议摄像机等消费类产品可以与计算机进行高速、高性能的数据传输。另外值得一提的是,USB2.0的加强版USB OTG可以实现没有主机时设备与设备之间的数据传输。-How to improve the USB interface of EMI and ESD design.
  3. 所属分类:USB develop

    • 发布日期:2017-04-26
    • 文件大小:151015
    • 提供者:hu
  1. ESD

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  2. Embedded System Design: A Unified Hardware/Software Approach Frank Vahid and Tony Givargis Department of Computer Science and Engineering University of California
  3. 所属分类:software engineering

    • 发布日期:2017-03-26
    • 文件大小:815795
    • 提供者:hardy
  1. ESDProtection

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  2. ESD Protection for PCB Design
  3. 所属分类:SCM

    • 发布日期:2017-04-26
    • 文件大小:119628
    • 提供者:hj.soon
  1. PCBdeESD

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  2. PCB设计的ESD抑止准则,帮助进行电子设计的防静电应用-Suppress ESD PCB design guidelines
  3. 所属分类:Goverment application

    • 发布日期:2017-04-17
    • 文件大小:108191
    • 提供者:liuwenhao
  1. ESD

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  2. Embedded system design codes for you .
  3. 所属分类:ARM-PowerPC-ColdFire-MIPS

    • 发布日期:2017-12-01
    • 文件大小:618028
    • 提供者:harshil
  1. pcbemc

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  2. PCB控制设计指引,适用于各种软件环境,软硬件工程师必备手册-PCB design manual,EMC and ESD control.
  3. 所属分类:software engineering

    • 发布日期:2017-04-05
    • 文件大小:389390
    • 提供者:bob
  1. JIEKOU

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  2. 为你详细介绍各种接口的芯片选型,接口类型如1394 CAN Crosspoint Display ESD/EMI I² C Isolation LVDS/M-LVDS Optoelectronics PCIe RS232/422/485 SerDes UARTs USB Voltage-Level Translation xECL,为你解决常用接口的设计难题,提供各种接口的原理图设计-You detail the various interface chip selection, int
  3. 所属分类:software engineering

    • 发布日期:2017-05-12
    • 文件大小:2580310
    • 提供者:王晓亮
  1. Java_buy-CodeBase

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  2. CENS bill payment, online payment structure. made in JAVA Circuitry design and structure determine the degree of sensitivity. Networks built into many integrated circuits provide some protection, but in many cases, ESD contains enough power to alter
  3. 所属分类:Java Develop

    • 发布日期:2017-05-09
    • 文件大小:1861720
    • 提供者:johrmande
  1. sc2262

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  2. Fig. 2 shows the conventional ESD protection design with dual diodes (DPand DN) at RF I/O pad and the power-rail ESD clamp circuit between VDDand VSS[3]. Under positive-to-VDD (PD) or negative-to-VS
  3. 所属分类:Communication

    • 发布日期:2017-04-23
    • 文件大小:220671
    • 提供者:Thanh
  1. SC2272_eng

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  2. MOSFET, which leads to a very low ESD robustness if no appropriate ESD protection design is applied. Once the RF front-end circuit is damaged by ESD, it can not be recovered and the RF functiona
  3. 所属分类:File Formats

    • 发布日期:2017-04-26
    • 文件大小:54758
    • 提供者:Thanh
  1. controller

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  2. Simple Microprocessor Design (ESD Book Chapter 3) Copyright 2001 Weijun Zhang Controller (control logic plus state register) VHDL FSM modeling- Simple Microprocessor Design (ESD Book Chapter 3) Copyright 2001 Weijun Zhang C
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-13
    • 文件大小:1642
    • 提供者:mohamed
  1. Controller(FSM)

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  2. Simple Bridge (ESD book figure 2.14) by Weijun Zhang, 04/2001 RT level design using Controller(FSM) + DataPath- Simple Bridge (ESD book figure 2.14) by Weijun Zhang, 04/2001 RT level design using Controller(FSM) + DataPath
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-13
    • 文件大小:1573
    • 提供者:mohamed
  1. GCD-CALCULATOR

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  2. GCD CALCULATOR (ESD book figure 2.11) Weijun Zhang, 04/2001 we can put all the components in one document(gcd2.vhd) or put them in separate files this is the example of RT level modeling (FSM + DataPath) the code is synthesize
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-13
    • 文件大小:1919
    • 提供者:mohamed
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