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Spartan6 GTP PCIe xfest 2009 v1.0
- 采用Xilinx公司的Spartan6 FPGA设计PCI Express的详细参考资料-Xilinx' s PCI Express, Spartan6 FPGA design, detailed reference information
aurora_bram
- Xilinx SP605评估板 Aurora IP(GTP 简单协议) 核功能验证 调试源代码 chipscope验证通过-Xilinx SP605 Evaluation Kit Aurora IP core functional verification debugging source code and chipscope verified
GPRSGTP
- 第三代移动通讯网(WCDMA)通用分组无线业务核心网技术规范 跨Gn、Gp接口的GPRS GTP隧道协议 -WCDMA Gn GpGPRS GTP
nwgtpv2c-0.11.tar
- newgtp的代码，主要负责实现分析gsn间的网络协议gtp协议，包括gtpv2版本的报文解析。-newgtp code, is mainly responsible for implementing network protocols gtp gsn between protocol analysis, including gtpv0, gtpv1 version of the message
brown-1.0.tar
- 结合GTP网络协议的随机下围棋的算法。很多实现上的思想值得借鉴。-GTP binding network protocols random chess algorithm. Many thought the realization worth learning.
GTP
- The schematic, photos and PCB have been developed by PICMASTERS based on some valuable works done before. This programmer supports pic10F, 12F, 16C, 16F, 18F,24Cxx Eeprom. Unfortunately, it works with only Winpic800 v.355.
EVAL-CN0150A-SDPZ-GRB
- CN0150-GBR-C.GTL Top Copper CN0150-GBR-C.GL2 Inner Layer 1 CN0150-GBR-C.GL3 Inner Layer 2 CN0150-GBR-C.GBL Bottom Copper CN0150-GBR-C.GTO Top Overlay CN0150-GBR-C.GBO Bottom Overlay CN0150-GBR-C.GTS Top Soldermask CN0150-GBR-C.GBS Botto
nysa_sata_latest.tar
- The Xilinx CORE Generator™ is used to create a single-lane PCIe Endpoint Plus design. The generated PCIe system contains the PCIe endpoint plus block, GTP tiles, block RAMs, and clock and reset modules. The tutorial below shows how to create the
gtp-usb-lite-pic-programlayici
- This a basic usb programer-This is a basic usb programer
openggsn-0.91.tar
- open source of GGSN, gtp library is also included. No charging interface but enough for test system.