搜索资源列表
StateCAD独立运行版
- 状态机设计工具，ISE11以后都没有集成了。这个版本可独立运行，不需要ISE
ise_11[1].3_licgen
- Xilinx ISE11破解软件（支持xp win7）-Xilinx ISE11 cracking software (to support xp win7)
ISE_11.1_licgen_v2.rar
- 这是赛灵思公司新出的ISE 11的破解方法，很有用的啊，详细的应用见里面的介绍啊。,This is the new Xilinx ISE 11 out of the crack method, very useful, ah, the application of detailed introduction see inside ah.
dds
- verilog 硬件语言实现DDS，使用ise11.1和modelsim se6.5仿真测试-verilog hardware language DDS, using the simulation test ise11.1 and modelsim se6.5
ISE
- XINILX最新开发软件版本,ISE11.1,这里的资源最好,比讯雷快得多 -XINILX latest development software version, ISE11.1, where the resources of the best, much faster than the Thunder
ise_11[1].3_licgen
- ise11.3的，请用来学习又没有钱的朋友使用，不要外传，谢谢！-ise11.3, please no money is used to study the use of a friend, not rumor, thank you!
ml505_mig_design
- Xilinx开发板ML505的DDRII示例程序，使用Verilog，调用MIG，编译环境ISE11.1-Xilinx ML505 development board of DDRII sample program, using Verilog, called MIG, build environment ISE11.1
lock_wsh-v2
- FPGA开发，电子密码锁，使用ISE11.1开发而成-The electronic lock
div_any_nodd
- 使用verilog硬件语言实现任意奇数分频，使用ise11.1和modelsim仿真测试-Verilog language using any odd hardware divide, and the modelsim simulation testing using ise11.1
div_n_0_5
- 使用verilog实现任意奇数n+0.5分频，使用ise11.1和modelsim se6.5仿真测试-Using an arbitrary odd number n+0.5 verilog divide, the use of simulation testing ise11.1 and modelsim se6.5
fir_lowpass
- 硬件语言实现数字低通滤波器，使用ise11.1和modelsim se6.5 仿真测试-Hardware language digital low pass filter, the use of simulation testing ise11.1 and modelsim se6.5
license_ISE_11_to_12_AVNET-yyy
- ise11.1的license，包括了fifo等IP核，谢谢大家的光顾。-ise11.1‘s license which provided some ip like fifo.