This project was undertaken to produce a low power FIR filter for inclusion in a VHDL target library. The design was completed using OrCAD s Capture CIS, from this the VHDL code has been extracted. This method has allowed complete testing of the syst

60 分钟学会 OrCAD Capture CIS -OrCAD Capture CIS

candence orcan cis 9.0 中文教程，详解如果利用该软件设计原理图-dadaf fdasf