搜索资源列表
FPGAEPP.files
- USB、串口、并口是PC机和外设进行通讯的常用接口，但对于数据量大的图像来说，若利用串行RS-232协议进行数据采集，速度不能达到图像数据采集所需的要求；而用USB进行数据采集，虽能满足所需速度，但要求外设必须支持USB协议，而USB协议与常用工程软件的接口还不普及，给使用带来困难。有些用户为了利用标准并行口(SPP)进行数据采集，但SPP协议的150kb/s传输率对于图像数据采集，同样显得太低。因此,为了采集数据量大的图像数据,本文采用了具有较高传输速率的增强型并行口协议(EPP)和FPGA，
FPGA与USB通信的测试代码
- FPGA与USB通信的测试代码，包括FPGA中的程序（Verilog编写）和PC机上的主控程序以及USB固件程序。,FPGA and the USB communication test code, including the FPGA in the procedure [Verilog prepared] and PC-control procedures, as well as the USB firmware.
FPGA-usb-control
- USB 68013 通用固件 和配套上位机程序以及下位机FPGA程序verilog 可实现USB高速通信-USB 68013 generic PC firmware and supporting procedures and lower computer USB FPGA program can achieve high-speed communications
USB_FPGA_FOR_SRAM-control
- 此程序完成PC上位机通过USB与板上SRAM进行的数据传输交换，有CY7C68013A的SALVE_FIFO的完整固件及FPGA的SRAM驱动程序，并已调通可用了。-This process is complete PC via USB and PC-board SRAM for data transfer exchange, complete with CY7C68013A of SALVE_FIFO of SRAM FPGA firmware and drivers, and has bee
usb_VC
- usb数据采集-上位机程序vc完整工程（配合cypress的usb芯片使用）-usb data acquisition- complete PC vc program works (with the usb chip to use cypress)
usb_wr_firmware
- CY7C68013固件 FPGA把数据通过usb写入pc slave 模式 使用 EP6 -USB:FPGA write data to PC by USB change from cypress example slave mode and use EP6 bulkloop.c firmware based on the firmware frameworks. Building this example requires the full vers
usbFPGAconnect
- 该例程是PC机通过FX2-CY7C68013-A的USB2.0控制芯片与FPGA实现通信。其中的工程和代码包括PC机上的USB固件程序、驱动程序、上位机程序，FPGA上的VERILOG通信程序。-The routine is a PC, through the FX2-CY7C68013-A of the USB2.0 controller chip and the FPGA to achieve communication. One of the projects and code, incl
calculator_vhdl
- Design PC calculator controlled by PC, using FPGA .PC and FPGA are connected by USB. -Design PC calculator controlled by PC, using FPGA .PC and FPGA are connected by USB.
pc
- 键盘和USB与PC机的接口程序，适用于CPLD FPGA设计中，与上位机的连接与通信-Keyboard and USB and PC-interface program for the design of CPLD FPGA with PC connectivity and communication
usb_wr_Verilog
- fpga ubs通讯模块 verlog语言 使用EZ-USB FX2-USB interface. use EZ-USB FX2 carry out PC communication with FPGA by USB.
FT2232H_USB_Core
- 在FPGA外扩用FT2232 实现UART TO USB 2.0 的通信。-The FT2232H is a USB2.0 Hi-Speed USB Device to FIFO IC. This core allows the use of this chip with an FGPA design in high speed FT245 style synchronous FIFO mode. Data rates up to 25 mbytes/s can be achieve
GNSS_OEM_USB_FPGA
- fpga usb 采集程序，将AD采集过来的数据经USB传给PC机-fpga usb acquisition program, the AD acquisition over the data passed to the PC via USB
USB-FPGA-communications
- CY7C68013-A实现PC机与FPGA的USB通信例程-CY7C68013-A USB communication routines between PC and FPGA
USB
- 此例程是基于FPGA的USB控制器实例，主要功能为通过FPGA芯片控制USB芯片，实现开发板和PC机之间的USB接口数据通信，来模拟一个硬件加密设备的功能。用Verilog语言实现。-This routine is an instance of the USB controller based on FPGA, the main function is to control USB chip by the FPGA chip, implement the USB interface for da
usb
- pc与fpga之间的数据传输 在fpga上有一个usb芯片cy68013 用verilog来对usb芯片进行控制-the communication between pc and the fpga，these is a cy68013 on the fpga，which is controled through verilog
fpga-usb-verilog-test
- 红色飓风开发板中USB测试源码部分，包含说明文档，FPGA的verilog代码，cy68013固件程序，上位机测试程序。实现USB回环测试，可作为usb开发的参考文件-Red hurricane development board of the USB test source code, including documentation, FPGA verilog code, cy68013 firmware program, PC test program. Realization of USB
TestProject
- 用fpga + usb ,fpga 用ep3c10e144 , usb 用釙68013日. 使用nios dma 傳輸數據至cy7c68013 , 經usb 到電腦-it use altera cyclone iii ep3c10e144 and cypress cy7c68013a to pc using nios dma to transmit data to pc via cy7c68013
USB
- 实现FPGA与PC通信的USB2.0接口,采用verilog语言实现-Implementation of FPGA and PC communication USB2.0 interface, using Verilog language to achieve
utosnet_latest.tar
- The uTosNet framework aims at providing a very fast method for interfacing physical components, such as motor drivers, ADCs, encoders, and similar, to applications on a PC. The framework is based on the Node-on-Chip architecture (link to paper comi
CCD_Array
- Interface TCD1209DG with Altera FPGA and transfer image data to PC via USB using USB FX2 Slave FIFO mode, Only FPGA code included.