Verilog HDL语言编写的基于M4K块配置ROM的字符数据存储VGA显示实验代码，引脚分配适用于21EDA的EP2C8Q208开发板, 详细解说请参见特权同学《深入浅出玩转FPGA》视频教程中的《Lesson30：SF-EP1C开发板实验9——基于M4K块配置ROM的字符数据存储VGA显示实验》-experimental code written in Verilog HDL language，ROM configuration based on M4K block for the cha

this a EP1C3 Development Board schematic diagram. There is a detailed interface specifications-this is a EP1C3 Development Board schematic diagram. There is a detailed interface specifications

基于SF-EP1C开发板的256色VGA显示实验，VGA显示是FPGA中重要的一部分，此代码进行了初步研究。-SF-EP1C development board based on a 256-color VGA display experiment, VGA display is an important part of the FPGA, this code has been studied.