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FixToFloat.将16位二进制有符号纯小数转换为32位单精度浮点数
- 将16位二进制有符号纯小数转换为32位单精度浮点数。实际应用时，最好加tsu、tco约束条件，速度会快些。,There will be 16-bit binary decimal symbol is converted to pure 32-bit single precision floating point. Practical applications, it is best to increase tsu, tco constraints, the speed will be faste
assignmentP2
- 1. Access the relevant reference books or technical data books and give accurate definitions for the following timing parameters: (1) propagation time tPD, (2) transition time tTD, (3) setup time tSU, (4) hold time tHD, and (5) clock-to
CyclonePLL
- Cyclone™ FPGA具有锁相环（PLL）和全局时钟网络，提供完整的时钟管理方案。Cyclone PLL具有时钟倍频和分频、相位偏移、可编程占空比和外部时钟输出，进行系统级的时钟管理和偏移控制。Altera® Quartus® II软件无需任何外部器件，就可以启用Cyclone PLL和相关功能。本文将介绍如何设计和使用Cyclone PLL功能。 PLL常用于同步内部器件时钟和外部时钟，使内部工作的时钟频率比外部时钟更高，时钟延迟和时钟偏移最小，减小或调整时钟
tsu
- 求主副测线交点差，自动判断测线相交与否，可用于物探工程-Lord Deputy measuring line intersection difference
AD_VGA
- AD驱动 TW2815/tw2865/TW9910/al244/sv2825 VGA驱动 TVP5715-AD driver TW2815/tw2865/TW9910/al244/sv2825 VGA driver TVP5715
time
- 几篇解读FPGA内部时序问题的好文章，从最近本的Tco,Tsu，Th等入门。一直到如何对时序进行约束，如何处理各种影响FPGA时钟的因素。如何读懂时序图（Interpreting the Timing Diagram） -FPGA internal timing problems read several good articles, from the most recent of Tco, Tsu, Th and other entry. How the timing has to be co
good
- 可以自动检测软件是否要更新！！！很实用，适合新手。-Institute of field trials of new trendy Yo ! ∵ ! University Last updated !! element Tsu Nina sucking force !! Forest Alternative I Alternative . E Tsu pre-threshold
TSUxxAWK-code
- MStar TSU系列LCD monitor显示板源码，因为该系列芯片已停产，所以分享出来工大家研究-MStar TSU series LCD monitor display board source, because the chips have been discontinued, so we share out work study
tsu56ak_ds_v01_proview
- MStar TSU56AK 芯片规格书,为配合TSU系列源码而分享-MStar TSU56AK chip specifications to meet TSU series source and Share