搜索资源列表
USB2.0_rtl_ipcore_verilog
- 经过门级网单验证的USB2.0 IP核 RTL代码-net after gate-level verification of USB IP Core RTL code
USB2.0IP_core_Verilog
- 完整的用VERILOG语言开发的USB2.0 IP核源代码，包括文档、仿真文件-complete with verilog language development USB2.0 IP source code, including documentation, Simulation documents
usb_funct
- usb2.0 ip 文挡齐全,并已经过FPGA的验证,希望大家支持
USB2.0IP.rar
- 完整的用VERILOG语言开发的USB2.0 IP核源代码,包括文档,Complete Verilog language developed by USB2.0 IP core source code, including documentation
USB2.0-IP-core
- 用verilog 写的USB2.0，含源码。从别处找来的，不敢独享，希望对大家有帮助-Written by verilog USB2.0, including source code. Recruited from elsewhere, and not exclusive, we want to help
VERILOG-USB2.0IP-core
- 完整的用VERILOG语言开发的USB2.0 IP核源代码，包括文档、仿真文件-VERILOG language with a complete development of USB2.0 IP core source code, including files, simulation files
USB2.0IP(RTL)
- USB2.0 IP核,ASIC,FPGA可用,Verilog HDL源代码-USB2.0 IP,Verilog HDL
usb_funct[1].tar
- usb2.0的IP核，可在QuartusII或MaxPlusII环境下实现编译和生成ip核-usb2.0 IP nuclear, QuartusII or the environment under MaxPlusII compile and generate nuclear ip
USB_IP
- 介绍了采用FPGA实现USB2.0 IP核的详细方法和步骤以及仿真方法-This paper introduces an FPGA to achieve the USB2.0 IP core in detail the methods and steps as well as the simulation method
usb_funct
- usb 2.1 IP 的 东西 很好的 是 我的 -usb2.1 IP it s so eay to me to you
USB2.0DeviceControllerIPCoreDesignandVerification.
- USB2．0设备控制器IP核的设计与验证-USB2.0 Device Controller IP Core Design and Verification
usb2
- USB 2.0 IP Core for USB Interfacing
verilog-usb--protel-design
- 基于FPGA的usb2.0 ip核设计，所用的语言是verilog-FPGA-based usb2.0 ip core design, the language used is the verilog
usb2.0_funct_ip
- 一个USB2.0的IP核（详细verilog源码和文档），很不错的参考设计-A USB2.0 IP core (for details verilog source code and documentation), it is a good reference design
USB_IP-CORE-design
- USB2.0的IP核，需要添加额外的PHY模块，使用Verilog语言编写-USB2.0 IP core, you need to add additional PHY module, using the Verilog language
USB2.0-IP
- USB2.0 IP核源代码，经典好用！写这么多真没意思！-USB 2.0 IP core source code, easy to use classic! Write so really boring!
USB2.0IP
- usb2.0的IP核，对于USB接口通信的FPGA设计有很大帮助，对于接口硬件的控制更为灵活。 有详尽的USB2.0协议说明-usb2.0 IP core for FPGA design of the USB interface communication, more flexible control interface hardware. Detailed USB2.0 protocol descr iption
USB2.0IPcoredesign
- USB2.0的IP核开发.代码可以直接使用已经验证过。-USB2.0 IP core development. Code can be directly used has already been verified.
USB2.0
- 完整的用VERILOG语言开发的USB2[1].0 IP核源代码，包括文档、仿真文件-USB2 module
USB2.0的IP核（详细verilog源码和文档）
- USB2.0的IP核开发.代码可以直接使用已经验证过(USB2.0 IP kernel development. Code can be used directly, has been verified)