usb2.0 fpga程序 用vhdl语言编写 quartus环境实现 -usb2.0 fpga using vhdl language program quartus environment to achieve

usb2.0的IP核，可在QuartusII或MaxPlusII环境下实现编译和生成ip核-usb2.0 IP nuclear, QuartusII or the environment under MaxPlusII compile and generate nuclear ip

TCD1304 CCD 驱动 AD转 USB2.0传输(This code based on verilog language, worked on EP1C3T144 FPGA chip, developed on Quartus II 12.0 . The ccd's data transformed by USB2.0 after amplified and AD confromed.)