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AMBA 3 AXI handshake protocol. Verilog platform. master and slave.
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The
elements come from the necessity of creating generic
modules, in the verification phase, for this widely used
protocol. These primitives are presented as a not
compiled library written in SystemC where interfaces
are the core of the lib
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amba AHB coding in verilog HDL and integrating with AHB to AXI Brigde,amba AHB coding in verilog HDL and integrating with AHB to AXI Brigde
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2下载：
amba总线中axi的slave部分，用verilog实现的slave.(The slave part of Axi in the AMBA bus, slave. implemented with Verilog)
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