搜索资源列表
handshake
- AMBA 3 AXI handshake protocol. Verilog platform. master and slave.
System_Design_and_Implementation_of_AXI_Bus
- AMBA AXI资料，台湾硕士论文，网上收集-AMBA AXI, Taiwanese master' s thesis, on-line collection of
BP062-BU-01000-r0p0-00rel0[1][1].tar
- AXI协议检查器，由ARM公司开发对于想开发AXI master和slave模型的ASIC设计人员非常有用！-AXI protocol checker, developed by ARM to develop for the AXI master and slave model is very useful ASIC designers!
axi_master_latest.tar
- RobustVerilog generic AXI master stub源码，包括文档说明-RobustVerilog generic AXI master stub
verilog-master-files
- Verilog master files of AMBA axi interface
AXI_Master_FSM
- AXI Master, is implement with FSM
axi_master
- 自己写的 AXI master code-AXI master code
rajeev
- the above file gives the AXI protocol master and ACE protocol and clock and reset
zc706-axi-dma-fifo-master
- zc706 axi-dma-fifo-master example
uvm_axi-master
- axi uvm vip, verification model -axi system verilog
xilinx_axidma-master
- xilinx axi dma driver
HamamatsuCameralink-master
- 实现cameralink，通过xilinx 生怕日天系列实现多路decameralin(Realize cameralink, realize multi-channel decameralin through Xilinx fearful day-to-day series)
verilog-axi-master
- Verilog AXI Components Readme GitHub repository: alexforencich verilog-axi