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digital-watch-report
- 数字电子钟的设计报告！对“模拟电子技术”，“数字电子技术”课程的理论知识进行总结-digital electronic clock design reports! "Analog Electronic Technology," "Digital Electronic Technology" of theoretical knowledge summary
shuzizhong
- 可预置数字钟，用VHDL语言编写，LED显示，普通数字钟表。-Digital clock can be preset using VHDL language, LED display, an ordinary digital watch.
watch
- 功能更强大的数字时钟,有年份,月,日,时,分,秒和星期,可以调校-More powerful digital clock, there are years, months, days, hours, minutes, seconds and weeks, you can adjust the
watch
- 用VHDL设计实现秒表功能：秒表功能包括开始/暂停键和清零键，精度要达到0.01秒，所以计数显示共有八个数码管，而每个数码管又有八个管脚，因此采用扫描显示的方法，减少管脚数量。时钟脉冲由最低位给入，采用异步方式驱动更高位的计数，时钟频率应该为100Hz，通过数码管显示，共有八个数码管，所以扫描频率应在100Hz的8倍以上。（付按键消抖代码）-VHDL design with a stopwatch functions: stopwatch features include Start/PAUSE
watch
- digital watch display source.. analog watch.. c-digital watch display source.. analog watch.. c++
dianzisheji
- 主要包含了让一只灯亮起来和让流水灯亮，还有数字钟的程序，欢迎下载- this program include let a led be lighted and let alot of led be lighted and a digital watch
jam_vb
- this is source code for digital watch
miaobiao
- 数字时钟程序，基于AT89S51,需要的赶快-Digital watch based on AT89S51,download with your need.
watch
- 可通过数码管显示时，分，秒用一个点闪烁时，分均可调，24小时制 。-Available through digital display hours, minutes and seconds with a flashing point, the points can be stressed that the 24-hour clock.
Led4v2.0
- 基于mega16的LED数字手表程序。ATmega16；LED；数字手表。-Based on the LED digital watch mega16 program. ATmega16 LED digital watches.
stopwatch
- 数字秒表的VHDL代码。当设计文件加载到目标器件后，设计的数字秒表从00-00-00开始计秒。，直到按下停止按键（按键开关S2）。数码管停止计秒。按下开始按键（按键开关S1），数码管继续进行计秒。按下复位按键（核心板上复位键）秒表从00-00-00重新开始计秒。-The VHDL code for digital stopwatch. When the design document loaded into the target device, the designed digital stop
Time.Multiplexed.7Seg.Watch
- Proteus simulation showing how to implement digital clock with multiplexed 7-segments displays using MUX and decoders.
java95
- 本例通过多线程技术每100us重绘界面 在绘制界面时 根据时间绘制成表盘和指针的形状 同时 在表盘下方是数字表显示时间-That this example is in dial down part by the fact that multi-thread technology each 100 us draw an interface again while drawing the form becoming the dial and guiding principle according t
DigitalWatch
- Digital watch write in Verilog HDL language simulate the real clock in Atera DE2 development board
watch(2)
- digital watch : verilog source code
watch
- 本文件为电子设计而开发的多功能数字钟VHDL语言完整源代码 --该数字钟实现的功能有时间，秒表，闹钟，年月日的显示设置等 -This document is multi-functional electronic design and development of a complete VHDL, digital clock source code- the digital clock function can be achieved time, stopwatch, alarm clo
watch
- EDA数字钟VHDL的程序,它分多个模块进行,主要是采用VHDL语言而不是Verlog语言-the program for digital clock of EDA
watch
- 数字时钟可实现时钟 闹钟 秒表 闹钟响（蜂鸣器）的功能-digital watch
Digital-Watch
- Digital Watch with ALarm option
VHDL Digital Clock
- A digital stop watch designed in VHDL