搜索资源列表
Float
- 单片机浮点运算子程序,使用C51编程，可分别得到整数部分和小数部分,数据存储长度为4字节.-SCM floating point routines, the use of C51 programming, respectively integral part and be part of a minority, data storage for 4-byte length.
float-point
- gcc支持soft fp 和hard fp两种，这里是实现了soft fp.-gcc support soft and hard fp fp two, here is the realization of a soft fp.
fp-adder
- 上海交大float point adder 设计ppt-float point adder design ppt
AMRV3_5_0(float-point)
- 符合3GPP标准的AMR浮点代码，适合在PC端实现AMR算法。
float-ieee754
- floating point number presentation(IEEE 754 standard)
float
- 符合IEEE754标准的16进制转浮点数代码-IEEE754-compliant floating-point standard hex code switch
float_fract_2117
- convert float to fixed point number and from fixed point to float
32-float-point-adder
- 32位浮点加法器。我第一次上载源码你就放过我吧，我就是想看一看加法器应该怎么做。-Floating point adder
float
- 16进制与浮点数的转换 用于modus中对浮点数的观察-16 hex and floating-point conversion for the modus observations on floating-point
float_mul_verilog
- 浮点乘法verilog代码，浮点格式遵循 IEEE754 标准。-Float Point Multiply , im verilog
float
- 基于ADSP sharc系列的DSP ts201浮点数程序源代码-Series based on the ADSP sharc floating point DSP ts201 source code
FLOAT
- 介绍关于FPGA的浮点加法器运算单元设计-Information on floating-point FPGA-adder cell design computing
fftforc51
- 51上写的浮点FFT程序，经过Matlab验证-float point fft for 89c51 verifyed by matlab
float_div_verilog
- 浮点格式遵循 IEEE754 标准。verilog设计源代码。-float point div . in verilog design.
Floating_Point
- 基于FPGA的浮点小实验 hdl 语言描述-float point based on FPGA
fp_mul
- float-point multiplication standart IEEE-754
float
- 搜集的关于[C51源码]浮点数显示并提供了浮点数显示格式的说明，对c51更深入学习有所帮助。-Collected on the [C51 source] float displays, and provides a descr iption of floating-point display format, more in-depth study on the c51 help.
wp-01166-bdti-altera-floating-point-dsp.pdf
- Altera float point design flow
float-point-divider
- 基于FPGA的单精度浮点除法器vhdl设计程序,分模块程序。-FPGA-based single-precision floating point divider vhdl design program, sub module program.