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Floating point library for the 8052
- 8052单片机的浮点数运算库汇编语言源代码，可用于单片机的浮点数运算使用。Floating point library for the 8052.
Floating-point-complex-radix-2-decimation-in-time-
- 浮点复数基2时分FFT完成适当的FFT，输出改写输入缓冲器。-floating-point complex FFT-based two hours to complete the FFT output rewritten input buffer.
Fast Floating-Point Arithmetic Emulation on the Bl
- ADI BF 16位定点DSP的快速浮点仿真的汇编代码-ADI BF 16-bit fixed point DSP fast floating point simulation code compilation
add(FLP).32位元的浮点数加法器
- 一个32位元的浮点数加法器，可将两IEEE 754格式内的值进行相加,A 32-bit floating-point adder can be both within the IEEE 754 format to add value
div(FLP).rar
- 是Nios II處理器下客製化指令的一個32位元浮點數除法器，可將兩IEEE 754格式的值進行相除,Nios II processors are customized instruction under a 32-bit floating-point divider can be two format IEEE 754 value division
mult
- 32位浮点乘法器的源代码，用verilog来实现的-32-bit floating point multiplier source code to achieve with verilog
fudianshuyunsuan
- 介绍一组浮点数的运算代码，包括加减乘除运算的VHDL代码实现-Introduced a set of floating-point code of the operation, including addition and subtraction multiplication and division operations to achieve the VHDL code
mul(FLP)
- 一个32位元的浮点数乘法器，可将两IEEE 754格式的值进行相乘-A 32-bit floating-point multipliers, can be two format IEEE 754 values multiplied
divider
- verilog HDL编写的浮点除法器，编译通过，可综合。压缩包包含三个文件。-verilog HDL write floating-point divider, compile, can be integrated. Archive contains three files.
11
- 这是一个关于DSP定点和浮点运算的比较详细的解释,多学习DSP帮助很大-This is a study on fixed-point DSP and floating-point operations in a more detailed explanation, very helpful learning DSP
FLOATPOINT
- 浮点程序库，这里是AVR程序，包括浮点数比大小，加，减，乘，除，开方。-Floating-point library, here is the AVR procedures, including floating-point than the size, add, subtract, multiply, divide, prescr iption.
pre_norm_div
- 一种用VHDL语言描述的浮点除前规格化的源代码编程-VHDL language used to describe a floating-point addition to the source code before the standardized programming
pre_norm_sqrt
- 一种用VHDL语言描述的浮点平方根前规格化的源代码编程-VHDL language used to describe a floating-point square root of the source code before the standardized programming
26304-700
- 3rd Generation Partnership Project Technical Specification Group Services and System Aspects Extended Adaptive Multi-Rate - Wideband (AMR-WB+) codec Floating-point ANSI-C code -3rd Generation Partnership Project Technical Specification Gr
80C51programs
- C51单片机实用程序，包括定点数＼浮点数的运算，有丰富实用的例子-C51 single-chip utility, including fixed-point \ floating-point arithmetic, there is rich in practical examples of
FinalFPMultiplier
- Simple 32 bit Floating point Multiplier
floating-point-adder1
- 基于VHDL语言的32位单精度的浮点加法器-floating point adder based on VHDL
Floating-Point-Adder
- 浮点数加法器IP核的vhd设计。浮点数加法运算是运输中使用最高的运算，结合vhdl和EPGA可编程技术，完成具有5线级流水线结构、符合IEEE 754浮点标准、可参数化为单、双精度的浮点数加法器。-Floating point adder design IP core vhd. Floating-point addition operation is used in most transport operations, combined with vhdl and EPGA programmab
floating-point-adder
- verilog implementation of the floating point adder
floating-point-multiplier
- verilog implementation of the floating point multiplier