搜索资源列表
Pld_lab4
- stop watch in vhdl using MAXII development board.
speednew
- ISA板卡，CPLD原理图，altera maxII CPLD芯片。实现运动控制，标准安川伺服器控制接口。-ISA board, CPLD schematic, altera maxII CPLD chip. The realization of motion control, the standard control interface YASKAWA server.
qq
- 完整的QQ程序 原代码 经典再现值得学习-Integrity of the original code of the QQ process
MAXII
- 功耗是前一代CPLD系列的十分之一――MAX II器件的动态功耗很低，所以运行功耗较低。MAX II系列功耗是低成本MAX 3000A系列的十分之一。-Power generation CPLD family of the former one-tenth- MAX II device' s dynamic power consumption is very low, so low-power operation. MAX II family of low-cost, power cons
PLD
- vhdl语言实现cpld功能，本程序包括全加器，触发器，交通灯程序，适用maxII软件调试。-include full_adder,plus,traffic
get_6675_temp_2
- MAXII 240 CPLD和6675 开发的0-1023.75度的温度传感数据采集系统，用seg7 LED显示，精度0.25度。探头是K型测温线，Quartus II 6.0调是通过，在cpld开发板上面试验成功-MAXII 240cpld and 0-1023.75 development of 6675 degrees C temperature sensor data acquisition system, using seg7 LED shows that the accuracy o
max2_mii5v1
- Maxii EPM570C144CPLD 原理图-Maxii EPM570C144CPLD schematic
maxii_sch
- 采用EPM570作为核心，外接FIFO，RAM。可进行数据采集，采用60M时钟的ADC ADS830E。ADC前端电路需要改为差分输入方式以减小电路噪声。该电路经过实际检验可以使用，需要将JTAG电阻改为220以下或者短接。-EPM570 used as a core, external FIFO, RAM. Can be a data collection, using 60M clock ADC ADS830E. ADC front-end circuit differential inpu
LCD-hello
- VHDL syntax hello world for LCD written in VHDL MAXII evaluation board EPM1270F256C5
MAXII
- MAX II EPM7000 系列 FPGA CPLD 芯片的使用手册，仅供参考，-MAX II EPM7000 Series FPGA CPLD chip user manual for reference purposes only
photo_fee_system_code
- 用于altera maxii cpld的电话计费器示例程序和原理图-For the altera maxii cpld telephone meter sample application and schematic
an489_design_example(1)
- 了解maxii的内部结构，学会调用里面的ufm，充分利用其资源-Understand the internal structure of maxii learn to call the inside ufm, make full use of its resources
an490
- Altera官方网站提供的MAXII系列CPLD做电平转换的应用文档，非常实用的。-Official website of the MAXII Altera CPLD family to do the application-level document conversion, very practical.
max2
- maxii里面有MAXII 所有CPLD的引脚封装，功能描述，以及其他的一些功能介绍，是学习CPLD的很不错的资料-MAXII
Internal_UFM_Oscillator
- 本设计允许用户初始化并使用MAXII和MAX V中的内部时钟。-This application describes instantiating the internal oscillator and using it in the MAX® II and MAX V devices.
uartverilog
- 有关于CPLD的例程。芯片为MAXII，在quartusII下开发，是一个串口例程。-On CPLD routine. The chip is MAXII, in quartusII under development, is a serial routines.
verilogsram
- 有关于CPLD的例程。芯片为MAXII，在quartusII下开发，是一个读外部存储器的例程。-On CPLD routine.Chip for MAXII, in quartusII under development, and is a read routine of the external memory.
maxII_spi
- MAXII SPI interface with testbench
LCD12864
- 12864点阵图形液晶测试程序Altera MAXII EPM1270T144C5N-12864 dot matrix graphic LCD test programAltera MAXII EPM1270T144C5N
vga.v
- 基于altera公司的maxii epm240t100c5系列的 实现了 vgA接口控制-Based on the the altera Company' s maxii epm240t100c5 series realized vgA interface control