搜索资源列表
NAND256R3A_VE1
- 256Mbits (x8) 528 Bytes Page, NAND Flash Memory Verilog HDL Model User Manual -256Mbits (x8) 528 Bytes Page, NAND Flash Memory Verilog HDL Model User Manual
hdl
- 用Verilog语言编写的实现NAND Flash块的控制存取以及同步的FIFO的控制
micron m73a系列nand flash 芯片模型
- micron公司nand flash芯片m73a系列verilog仿真模型及测试代码
Samsung 8G x 8 Bit NAND Flash Memory SPEC & Simulatiom model
- Samsung 8G x 8 Bit NAND Flash Memory SPEC and verilog Simulatiom model
4NandFlash.rar
- 基于verilog hdl 的Nand Flash控制代码,Verilog hdl-based control code of the Nand Flash
MT29FxxG08xx.rar
- MT的NAND FLASH MT29FxxG08xx系列的Verilog仿真模型，包含详细说明，试验证明，非常准确。,MT of the NAND FLASH MT29FxxG08xx series of Verilog simulation model, contains a detailed descr iption, testing proved very accurate.
NandFlash-FPGA-controller(ECC)
- 该压缩包包括NAND FLASH（美光）的FPGA控制器的原理及VHDL源码，非常具有参考价值。-The archive includes NAND FLASH (Micron) the principle of the FPGA and VHDL source code control, very valuable reference.
NAND_Flash_Controller
- FPGA实现的NandFlash控制器（带ECC）文档+源代码。-FPGA implementation NandFlash controller (with ECC) document+ source code.
NANDFLASH
- 用VHDL开发的NANDFLASH的读写程序,给出 NANDFLASH的时序正确的读写-NANDFLASH developed using VHDL to read and write the procedures, timing NANDFLASH give the correct reading and writing
verilog__nand
- verilog source code nand gate
Nand_verilog
- NAND flash also uses floating-gate transistors, but they are connected in a way that resembles a NAND gate: several transistors are connected in series, and only if all word lines are pulled high (above the transistors VT) is the bit line pulled low.
NAND_IP
- Nand flash VHDL code and Nand flash verilog code
Flash
- 三星flash编程Verilog程序，单页编程，支持K9K4G08芯片-Samsung' s flash programming Verilog program, single-page programming, support K9K4G08 chip
l52a_nand_model
- 美光64GB nand flash 模型 verilog-micron 64GB nand flash verilog module
my_nand
- 与非门，Verilog实现，带实验说明文档。-NAND gate, Verilog implementation, with test documentation.
nand
- uso de compuertas nand para verilog
Verilogexample
- verilog example 1.NAND Latch To Be Simulated.2.A 16-Bit Counter.3.A D-Type Edge-Triggered Flip Flop.4.A Clock For the Counter.5.The Top-Level Module of the Counter.6.The Counter Module Described With Behavioral Statements.7.Top Level of the Fibonacci
ECC_check
- 实现对三星nand Flash的存储信息的错误检测，实现一位纠错，两位检错-ECC check 1bit correct 2bit check Samsung nand Flash
nand
- nand program in verilog