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190.7_Freq_divider
- QUARTUS II环境下VHDL编写的小数点分频器程序，实现190.7分频，可以将50MHz时钟频率分频成约等于2^21Hz频率，方便特殊情况下的运算-QUARTUS II, prepared under the decimal divider VHDL program to achieve 190.7 frequency, you can divide into a 50MHz clock frequency is about equal to 2 ^ 21Hz frequency, eas
fftsoft
- 应用altera的最新fft核做的使用范例，fft核遵循avalon总线。对于想使用altera的IP core的朋友有帮助-Application of nuclear altera do the latest example of the use fft, fft nuclear follow avalon bus. Who want to use the IP core of friends altera help
quartusII203quartusii
- 讲解quartus的一些基本操作，如设计输入，综合，布局布线，下载-Quartus explain some basic operations such as design entry, synthesis, layout, downloads
Verilogexamples
- Verilog初学编程实例，包括源程序及QuartusⅡ仿真结果，适合初学者了解学习-Verilog beginner programming examples, including source code and Quartus Ⅱ simulation results, suitable for beginners to understand the learning
altera_de2_vhdl
- Tutorial of VHDL with Altera DE2 board: quartus II and DE2 board The target do the BCD sum of input data coded with the switches and display the result on 7 segment display
total_game
- 用VHDL编写的小游戏，采用FPGA开发板，外接键盘和数码管可实现。 Quartus II上运行通过，并用FPGA实现。-failed to translate
singet
- quartus II环境下正选波发生器源代码 下载后可通过内嵌逻辑分析仪观测波形-quartus II environment, elections wave generator is download the source code can be embedded logic analyzer waveform observation
quartus_ii_tutorial_hierarchical
- quartus guide book for verilog
quartus_ii_tutorial
- quartus- II tutorial
DAC902
- DAC902测试 Quartus II 实现的-DAC902 test Quartus II implementation
8255_VHDL_source
- 基于quartusII的8255设计方案，采用硬件描述语言VHDL描述，很好的实现了8255通用接口芯片的设计-a project about 8255 chip based on quartusII,discr ipted by vhdl
seg4_to_7
- 7段数码管译码器，在quartus里面实现，4为二进制数转换为7段数码管显示方式的二进制数-7 digital control decoder, which achieved in quartus, 4 for the binary number is converted to 7-segment digital display means of a binary number
shiyan3
- 在quartus中打开，这是4位无符号数乘法器的bdf电路图。很精髓！-Open in quartus, which is 4 bit unsigned number bdf multiplier circuit. Very essence!
2010_07_01_VHDL
- 基于VHLD和Quartus II 8.0 的抢答器和交通灯程序。 -Based VHLD and Quartus II 8.0 of the Responder and the traffic light program.
21840261RS(32to28)encoderanddecodervhdl
- (32,28)编码和译码程序 ，基于vhdl来实现的，并且在quartus中运行实现-(32,28) coding and decoding process, based on vhdl to achieve, and run to achieve in quartus
Quartus_CRACK
- Quartus_CRACK_license.dat破解文件，对初学软件的朋友有用。-Quartus_CRACK_license.dat crack file, be useful for beginners software friends.
VtoRGB
- Verilog写得BT656视频数据转为RGB数据的Quartus工程文件！-The verilog module for changing BT656 data to RGB data!
MCU_FPGA_62256
- 单片机控制FPGA实现62256的读写功能的程序，使用Quartus II平台进行开发。-Microcontroller FPGA to read and write functions to achieve 62 256 procedures, the use Quartus II development platform.
led_test
- LED测试程序工程文件,VHDL代码，在Quartus II 6.0中测试通过。-led vhdl test programe in Quartus II
cnt_test
- 用Quartus ii 6.0开发的计数器工程文件，用VHDL语言编写-Counter programe used in VHDL,devlopment tool:Quartus ii 6.0