搜索资源列表
quartus
- 是一些quartusII下的IP核，自主开发的。包括有vga，ram等
Quartus+II+++ModelSim+SE+++后仿真+++库文件.rar
- Mentor公司的ModelSim是业界最优秀的HDL语言仿真软件，它能提供友好的仿真环境，是业界唯一的单内核支持VHDL和Verilog混合仿真的仿真器。它采用直接优化的编译技术、Tcl/Tk技术、和单一内核仿真技术，编译仿真速度快，编译的代码与平台无关，便于保护IP核，个性化的图形界面和用户接口，为用户加快调错提供强有力的手段，是FPGA/ASIC设计的首选仿真软件。
quartus 9.0 中FFT IP核的使用方法
- quartus 9.0 中FFT IP核的使用方法附带工程文件和用signaltapII抓到的波形,quartus 9.0 in FFT IP core attached to the use of engineering documents and the use of captured waveform signaltapII
Quartus IP核的使用方法和处理方法
- Quartus IP核的使用方法和处理方法，里面介绍的很详细讲的是IP核的的设计方法。-Quartus IP core using the method and approach, which describes in great detail about the IP core design approach.
DDS.rar
- Quartus中实现的DDS 使用的是altera提供的IP core,DDS achieved Quartus using IP core provided by altera
Quartus_fft_ip_core.rar
- Quartus中fft ip core的使用(modelsim 仿真FFT ip core 结合QUARTUS II 联合调试),Fft ip core in Quartus use (modelsim simulation FFT ip core integration QUARTUS II Joint Commissioning)
pwm
- 在Quartus 9.0 下实现的PWM IP核设计，周期占空比均可调。-PWM IP core design,which period and duty is adjustable.
SPI
- 经典spi IP 核心 FPGA是实现有说明文档-spi IP based on fpga
q_sys
- PCIe ip核。使用Quartus II 11.0，在Altera开发板4cgx15上验证通过。-PCIe ip core. Using the Quartus II 11.0, in the Altera development board 4cgx15 verify through.
usb_funct[1].tar
- usb2.0的IP核，可在QuartusII或MaxPlusII环境下实现编译和生成ip核-usb2.0 IP nuclear, QuartusII or the environment under MaxPlusII compile and generate nuclear ip
vhdl-MIPS
- Quartus-Altera Nios... VHDl based, complete MIPS implementation, document, flowcharts plus code
Quartus
- Quartus中fft ip core的使用.txt-Fft ip core in Quartus use. Txt
fftip
- Quartus中fft ip core的使用-Quartus in the use of fft ip core
altera_avalon_i2c_V90
- I2C IP for Quartus V9.0, can used in SOPC builder.
altera_avalon_i2c_V91
- I2C IP for Quartus V9.0 sp1, can used in SOPC builder.-I2C IP for Quartus V9.0, can used in SOPC builder.
oc_i2c_master_top_v92
- I2C IP for Quartus V9.0 sp2, can used in SOPC builder.
oc_i2c_master_byte_ctrl_v92
- I2C IP for Quartus V9.0 sp2, can used in SOPC builder.
components
- quartus的几个IP核（PWM,RAM,I2C）-quartus several IP core (PWM, RAM, I2C)
m-mtip-10_100_1000_ethermac
- 10/100 0M以太网MAC解决方案，是IP核的相关说明，利用ALTERA的FPGA设计，QUARTUS软件为开发平台。-10/100/1000M Ethernet MAC solution is the IP core instructions, using ALTERA' s FPGA design, QUARTUS software development platform.
Quartus-IP---usage
- 关于IP核的应用的说明 很好的参考手册 不要错过-IP core applications on the instructions not to miss a good reference manual