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Verilog-HDL
- 本CD-ROM包括《Verilog-HDL实践与应用系统设计》一书中的全部例子，这些例子全部通过了验证。第七章以后的设计实例，不仅有Verilog-HDL的例子，也附了包括VB、VC++等源程序,甚至将DLL的生成方法也详尽地作了说明。 -the CD-ROM include "Verilog-HDL Practice and Application System Design," a book the whole Examples of these examples w
rom
- Read-only memory,Verilog code
FPGA控制VGA显示（Verilog）
- 用FPGA开发板控制VGA显示，以800*600的分辨率，首先在屏幕的正中央依次出现“新”“年”“快”“乐”四个汉字，并分别移动到屏幕的四个角落，接着在屏幕中部从左至右依次出现“Happy New Year”英文字样，然后出现三个由小到大再消失的圆形图标模拟烟花，最后在黑屏中闪烁金星。字体均采用不同颜色，增添喜庆气氛。 本代码是练习VGA控制，ROM调用，时序控制及状态机运用的一个综合实例！
verilog.rar
- 《数字信号处理的FPGA实现》（第二版）光盘verilog代码," The FPGA digital signal processing to achieve" (second edition) CD-ROM code verilog
dlx_verilog.rar
- 这是我个人写的DLX处理器流水线的Verilog代码，在ModelSim中仿真通过，并且在ISE中能综合！即可以下载到FPGA中运行指令，指令可以根据需要定义，也可和相应的编译器配合使用，这里给学习流水线和Verilog的朋友共享。,This is my personal wrote DLX pipeline processor Verilog code, adopted in the ModelSim simulation and can be integrated in the ISE! T
rom.rar
- 基于Verilog语言编写的各种只读存储器rom和随机存储器ram,Verilog language based on a variety of read-only memory rom and random access memory ram
Verilog-HDL
- 《Verilog-HDL实践与应用系统设计》一书中的光盘源文件- Verilog-HDL practice and application of system design, a book on CD-ROM source file
rom
- verilog 编写的rom代码，开发环境为quartus-rom write verilog code development environment for quartus
rom
- Rom的读取的Verilog代码，自己编写的，大家参考参考啊-Rom read the Verilog code, I have written, your information ah
rom
- 基于verilog的rom存储器 简单实用 初学者的好材料-Rom memory, based on simple and practical verilog' s good material for beginners
miffile
- 用matlab产生mif文件。(Altera的EDA软件，如maxplus，quartus等用到的初始化rom，ram等的文件格式)-Mif files generated by matlab. (Altera' s EDA software, such as maxplus, quartus used to initialize and so on rom, ram, such as the file format)
RAM_Examples
- Verilog hdl code for representing ram and rom "memory" using many methods
ROM
- 本代码实现的是生成随机数的verilog 代码。可在ModelSim中仿真-The code is the verilog code to generate random numbers. In the simulation in the ModelSim
single_port_rom
- rom implemention in verilog hdl
Rom
- ROM的VERILOG实现，非常不错-ROM of the VERILOG achieve very good ~ ~
ROM
- Verilog sine的查找表，相信大家会用到-Verilog sine lookup table, I believe we will use
ram-rom-VerilogHDL
- 利用Verilog编写的各种RAM ROM的代码以及他们的测试模块-Prepared using a variety of RAM ROM Verilog code and their test module
ahdl--sine-wave-code-with-rom-look-up-table_imp.r
- hi this an verilog codes-hi this is an verilog codes
rom-test
- 简单的FPGA中ROM使用仿真程序，使用的verilog语言-Simple FPGA ROM emulator, using the verilog language
rom_test
- 基于SPARTAN6 的ROM读写内容，Verilog语言，完整工程(SPARTAN6 based ROM reading and writing content, Verilog language, complete engineering)