搜索资源列表
sata_device_model
- sata_device_model,对做硬盘控制器的朋友有帮助-sata_device_model, to make the hard disk controller has a friend help
CRC32_II
- 基于第二类LFSR串行CRC生成器的32位并行实现结构。用于SATA 3。 verilog语言。-32bit parrallel CRC module as specified in SATA 3. The module is realized with verilog.
groundhog_v_0_2
- Groundhog implements a SATA host bus adapter.-Groundhog implements a SATA host bus adapter. This Verilog-based project creates an easy-to-use interface between a user circuit on a Xilinx FPGA and a SATA hard drive or SSD.
sata_opencore_rtl
- SATA控制器代码，来自opencore(code for SATA controller, from opencore)
verilog实现sata2传输协议
- 基于verilog实现sata传输协议以及接口操作功能。