搜索资源列表
FPGASPI
- 用FPGA实现主SPI程序,包含开发工程、测试文件和源文件代码-fpga design the SPI code
AIC
- 使用FPGA/CPLD设置语音AD、DA转换芯片AIC23，FPGA/CPLD系统时钟为24.576MHz 1、AIC系统时钟为12.288MHz，SPI时钟为6.144MHz 2、AIC处于主控模式 3、input bit length 16bit output bit length 16bit MSB first 4、帧同步在96KHz-The use of FPGA/CPLD set voice AD, DA conversion chip AIC23, FPGA/
CC2500programmingusingAlteraFPGA
- This document gives the code for programming a CC2500 transceiver using Altera Stratix FPGA. The FPGA and CC2500 are connected through SPI mode with the FPGA as the master and CC2500 as the slave.
spi_master_control
- VHDL SPI 控制器FPGA官网提供-VHDL SPI controller FPGA to provide official website
CoreSPI
- 数字电子设计fpga设计的spi接口的ip_core，可以直接用于在fpga设计，支持actel的fpga芯片，支持主从模式，fifo大小可选。-Fpga design of digital electronic design spi interface ip_core, fpga design can be directly used to support actel the fpga chip, support master-slave mode, fifo size options.
spi_master
- 用VHDL编写的一个SPI主机程序，SPI模块采用最常用的模式0方式（即CPOL=0,CPHA=0）通信。文件内含测试文档，已在Modelsim6.5上测试通过，可在FPGA上直接调用。-A SPI Master code edited by VHDL language,the SPI modul use 0 MODE(i.e CPOL=0,CPHA=0)to communicate with the SPI Slave.and there is a testbench in the file
spi
- spi时序控制程序。在fpga中，数据传输等都会由spi进行与主控的交换，此程序用于在数据传输中spi部分的时序控制等。-The spi Timing control procedures. In fpga, data transmission, and will by spi master exchange spi part of this procedure is used in the data transmission timing control.
zhu
- 基于FPGA的SPI接口设计，主模式，频率可调，verilog HDL编写-FPGA-based SPI interface design, master mode, adjustable frequency, verilog HDL prepared
SPI_on-quartus
- spi master code for fpga quartus altera
SPI
- spi master code for fpga quartus altera
SPI-verilog
- spi master code for fpga quartus altera
FPGA_SPI
- 本源码是用verilog语言编写的FPGA的SPI主机代码，可以用做SPI开发参考。-The source code is written in verilog FPGA SPI master code, can be used to develop a reference SPI.
SPI-Master
- 有关Verilog的SPI通信的代码,可以应用于FPGA的通信-this is verilog code about SPI
SPI_Core_2
- 用Verilog HDL 语言编写的，可在FPGA上实现的SPI总线主端 收发读写模块 -SPI Master Read-Write controller core which was Writted by Verilog HDL based on fpga
spi_pdf
- FPGA spi通讯，包含test文件和master文件-FPGA spi communication, including the test document
SPI
- 使用VHDL写的SPI Master模块(Using the SPI Master module written in VHDL)
spi-fpga-master
- SPI Master code for use in fpga programming. the code model spi communication protocol.
spi master slave
- SPI master slave (fpga/verilog)
spi
- 利用VHDL在FPGA内实现SPI总线的主从控制器设计(SPI Master and Slave Controller)
adc_interface-master
- ADC_Interface Simple SPI interface for AD7908/AD7918/AD7928 written in verilog HDL