搜索资源列表
sqrt
- verilog 硬件平方根算法 采用与笔算平方根一样的算法
树式除法型开方器VERILOG实现
- 树式除法型开方器VERILOG实现,用于任意长度的无符号数的开方运算,Square root of the tree-type divider-type device to achieve VERILOG
sqrt32
- verilog源代码，用于开根号计算（32位）-sqrt32.v sqrt of 32-bit integer, Verilog source
470P2F07
- sqrt root using verilog
sqrt
- This zip file contains the verilog source code for square root calculation and its test bench
Kaifang
- 利用ISE编写的实现开方功能的verilog程序，利用了CORDICIP核，可以完成开方功能-Prepared using ISE verilog program to achieve prescribing functions, using the CORDICIP nuclear, prescribing functions to be completed
sqrt_Verilog
- Verilog实现开平方模块，内含有具体的算法描述Word文档，简单清晰明了。-sqrt with Verilog HDL. It is useful.
SQRT
- 用verilog代码编写的求整数平方根的FPGA工程。-Verilog code written request with the integer square root of the FPGA project.
sqrt
- 用verilog语言实现二进制数开方运算-verilog sqrt
sqrt
- VERILOG描述的开平方模块核，开方运算是FPGA或ASIC设计中所需要的核心运算模块。-VERILOG descr iption of open square modules nuclear root operation is the core computing module FPGA or ASIC design.
sqrt
- 用verilog实现的开2次方，已经在modelism中经过验证，其时间周期不固定。-Implementation open square with verilog.
Fast_SQRT
- 只使用简单的移位操作对32bit整型数进行开方的算法的Verilog实现-realize the sqrt algorithm which only use shift operation on 32bit int by Verilog