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ADAPTC
- 术是继直接频率合成和间接频率合成之后，随着数字集成电路和微电子技术的发展而迅速发展起来的第三代频率合成技术。DDS技术具有相对带宽宽、频-operation is the direct and indirect frequency synthesizer frequency synthesis, With digital integrated circuits and microelectronic technology development and the rapid development
adaptIDFIR
- 术是继直接频率合成和间接频率合成之后，随着数字集成电路和微电子技术的发展而迅速发展起来的第三代频率合成技术。DDS技术具有相对带宽宽、频-operation is the direct and indirect frequency synthesizer frequency synthesis, With digital integrated circuits and microelectronic technology development and the rapid development
wide_interval_hop_sequence
- kuanjiange_seq.m 基于对偶频带法和m序列，产生一个宽间隔跳频序列。 kuanjiange_seqencezu.m 基于对偶频带法和m序列，产生一个宽间隔跳频序列族。 注：其中的m序列是利用三个非相邻级控制频率合成器构造 L_G模型。-kuanjiange_seq.m based on dual band m sequence, have a wide interval frequency hopping sequence. Kuanjiange_seqence
cpldtodds
- dds信号发生器程序设计，框图，基于CPLD控制的DDS数字频率合成器设计-dds signal generator program design, block diagram, the CPLD based on DDS Digital Frequency Synthesizer Design
SIN_fashengqi
- 2006altera大赛－基于软核Nios的宽谱正弦信号发生器设计：摘要：本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA公司的 Cyclone 系列 FPGA 为数字平台，将微处理器、总线、数字频率合成器、存储器和 I/O 接口等硬件设备集中在一片 FPGA 上，利用直接数字频率合成技术、数字调制技术实现所要求波形的产生，用 FPGA 中的 ROM 储存 DDS 所需的波形表，充分利用片上资源，提高了系统的精确度、稳定性和抗干扰性能。使用新的数字信号处理（
MC145163PDDS
- MC145163P型锁相频率合成器的原理与应用-MC145163P - PLL frequency synthesizer and application of the principle
DDS_sin
- 用VHDL语言实现DDS直接数字频率合成器的设计，采用正弦RAM表，可实现频率可控的正弦数字信号，编译、仿真通过。-VHDL DDS Direct Digital Frequency Synthesizer Design using sinusoidal RAM table achieve controllable frequency sinusoidal digital signal, compile, through simulation.
flame09101086
- 基于51单片机的频率合成设计论文【同学捐助】 基于51单片机的频率合成设计论文【同学捐助】-SCM Frequency Synthesizer Design thesis students donor [51] Based on SCM Frequency Synthesizer Design [thesis students donor --
AD9852_DDS
- 基于DDS 芯片AD9852 的数字频率合成系统设计-based on the AD9852 DDS chip Digital Frequency Synthesizer Design
DDSxingnenfenxi
- 介绍了直接数字频率合成器DDS(Direct Digital Synthesizer)的组成、工作原理及性能 -introduced a direct digital frequency synthesis DDS (Direct Digital Synthes izer) the composition, theory and performance
MC145159PLL
- 基于MC145159的PLL频率合成器设计与实现 介绍了锁相环路频率合成器的基本原理,分析了集成锁相环芯片M C 145159的工作特性,给出了集成锁相环芯片M C 145159的一个应用实例,为高频频率合成器的设计提供了一个较好的思路.测试结果证明了设计的合理性与实用性,系统频率稳定度优于10-7.-MC145159 PLL frequency synthesizer design and realization of PLL frequency synthesizer the basic
Docs
- Creating a Voice Synthesizer Application
A.spur-free.fractional-N.pll
- A new PLL topology and a new simplified linear model are presented. The new fractional-N synthesizer presents no reference spurs and lowers the overall phase noise, thanks to the presence of a SampleJHold block. With a new simulation methodology it i
dual.band.GMSK.transmitte
- This paper presents the key circuits of a 1MHz bandwidth, 750kb/s GMSK transmitter. The fractional-N synthesizer forming the basis of the transmitter uses a combined phasefrequency detector (PFD) and digital-to-analog converter (DAC) circuit elemen
dds
- 直接数字频率合成器dds资料-Direct Digital Frequency Synthesizer dds information
钢琴模拟
- 一个钢琴模拟软件-a piano synthesizer software
freetts-1.2.1-tst
- speech synthesizer with JSAPI(Java Speech API). Source:http://sourceforge.net/projects/freetts
Driving_Buzzer_by_PWM
- The purpose of this document is to present how to use the Timer for the generation of a PWM signal tunable in frequency and duty cycle. As an application example, this document is based on a basic “music” synthesizer through an external buzzer. Examp
imskpe-1.0beta7-win32-full
- klatt共振峰语音合成器，可以修改模型参数达到修改合成语音音质的目的。该程序采用gtk开发，可跨平台使用-Formant voice synthesizer, model parameters can be amended to meet the synthetic voice quality purposes. The program uses gtk development, the use of cross-platform
发射部分采用锁相环式频率合成器技术
- 发射部分采用锁相环式频率合成器技术， MC145152和MC12022芯片组成锁相环，将载波频率精确锁定在35MHz，输出载波的稳定度达到4×10-5，准确度达到3×10-5，由变容二极管V149和集成压控振荡器芯片MC1648实现对载波的调频调制；末级功放选用三极管2SC1970，使其工作在丙类放大状态，提高了放大器的效率，输出功率达到设计要求。,Part of the launch phase-locked loop frequency synthesizer using technolog