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freqm
- a simple implementation of a frequency meter with the BCD-counter and the 7-segment LED display
bcd_updown_counter2
- It is a simple 4-digit bcd up down counter written in verilog
digital-frequency
- 数字频率计 采用Verilog语言编写，分为8个模块，分别是计数器，门控，分频，寄存器，多路选择，动态位选择，BCD译码模块-Digital frequency meter using Verilog language, divided into eight modules, namely, the counter, gated, frequency, register, multiplexer, Dynamic Choice, BCD decoding module
a_bcd_counter_using_verilog
- 3 bits bcd counter using verilog
VerilogCode_BCD_counter
- Verilog Code for a BCD counter and it is implemented on Altera DE2 board-Verilog Code for a BCD counter and it is implemented on Altera DE2 board
ContadorBCD
- Verilog counter 0000 to 9999 with BCD visualization
counterms
- verilog语言写的可置数的倒计时计数器，共四位bcd码，分别为分钟两位和秒两位。波形完美无毛刺.开发环境没找到verilog只好写了vhdl-verilog based counter for minutes and seconds
counter
- This is 2-BCD numbers Counter on board Altera DE2 Code Verilog HDL (You must import DE2_pin_assignments.csv to use this code)
BCD-Counter
- Verilog Module for parity
bcd counter
- Binary counter design in verilog
4位BCD计数器
- 用Verilog语言编程实现4位BCD计数器的功能(Write the programm with Verilog language to implement the function of 4 - bit BCD counter.)