搜索资源列表
PCIeDDR2add
- PCIE-DDR2-双通道ADDA板主要用于AD数据的记录与回放。该板主要使用Xilinx公司的Virtex5 FPGA，通过PCIE IP核与主机通讯，存储系统包括DDR2 SDRAM和FLASH，为各种软件无线电技术的应用提供了一个非常强大的单插槽收发器解决方案。-PCIE-DDR2 dual-channel ADDA board is mainly used for the AD data recording and playback. The board Virtex5 the FPGA
FaceDetection
- 基于adoost的fpga人脸检测程序，代码采用了verilog编写，用的是xilinx的virtex5芯片-face detection based on adboost. verilog is used，and virtex5 it isimplementated on virtex5.
uart
- xilinx板子virtex5板子上实现rs232串口通信实验，并通过led灯进行检测-xilinx the board virtex5 board rs232 serial communication experiment to detect and led through the lights
hdsdi_crc2
- xilinx virtex5 HDSDI_crc码-HDSDI_crc code
trs_detect
- xilinx virtex5 sdi 定时基准码检测-xilinx virtex5 sdi timing reference code detection
v5gtp_sdi_drp_control
- xilinx virtex5 sdi drp 控制-xilinx virtex5 sdi drp control
v5gtp_sdi_rx_reset
- xilinx virtex5 sdi复位控制-the xilinx virtex5 sdi reset control
triple_sdi_rx
- XILINX VIRTEX5 triple_SDI接受端-XILINX VIRTEX5 triple_SDI receiving end
VIRTEX2-ISE-VHDL
- XILINX virtex5 板子上做演化硬件时ISE 12.1中的硬件构架语言描述-XILINX virtex5 VHDL
ml507_bsb_vxworks_ppc440
- 在Virtex5的ppc440上移植Vxworks操作系统例子程序-In the transplant Vxworks operating system on a Virtex5 the ppc440 example program
xapp852.zip
- Xilinx Virtex5 for RLDRAM design,Xapp852 (Xilinx Design RLDRAM II Memory Interface for Virtex-5 FPGAs)
Virtex-5--user-manuals-chineses
- xilinx virtex-5 中文用户手册 介绍了virtex5 的内部结构 功能和使用示例 完整清晰 -Chinese virtex5 user manual describes the function and use of the internal structure of an example of complete and clear
Watch_Game_0729
- 基于xilinx virtex5的猜数游戏+LCD显示设计，包含完整的ISE工程文件，代码全部用verilog编写，有说明文档。-Based on xilinx virtex5， the guessing game plus LCD display design, including complete ISE project file, all code written in verilog, documents.
Virtex5-datasheet-
- VIRTEX开发必须的中文文档，非常适合初学者和学习xilinx原语的同志学习-VIRTEX development must the Chinese documents, very suitable for beginners to learn and learn from Comrade xilinx primitives
fir_ipcore_test(can-use)
- 基于virtex5的rom fir fft 三者ipcore联调-Based virtex5 of rom fir fft three ipcore joint commissioning
ps2
- 这是采用了verilog 语言编写的ps2，也就是键盘和FPGA交互的端口协议，适用于virtex5-This is used ps2 verilog language, which is the keyboard port protocol and interactive FPGA for virtex5
111
- FPGA virtex5 串口通信并点亮LED灯显示-FPGA virtex5 serial communication and turn on the LED light display
xapp1100_multi boot with virtex5
- multi boot with xilinx virtex-5