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frecuence
- 单片机频率计，简单的频率计，有源代码和电路图-Single-chip frequency counter
23825748digital_number
- 数字频率计课程设计报告 可能不是很好，本人能力有限，-Digital Cymometer curriculum design report may not be very good, I limited capacity
fequency
- 一款可用于数字频率计设计的IP核,使用该IP核科研构建基于SOPC技术的片上数字频率计，测频范围较宽。-A digital frequency meter using IP core
pinlv
- 一个基于51片子的数字频率计，希望对做毕业设计的同学有帮助！-51 film-based digital frequency meter, and they hope to do graduate design students help!
Frequency_LCD
- 用Keil开发的基于C51的LCD频率计（C语言）。有非常详细的注释及单片机原理图，本人亲写，有事联系QQ：709136596-Developed using Keil: C51-based LCD frequency counter (C language). Notes are very detailed and schematic single-chip, I pro-writing, emergency contact QQ: 709136596
frequentmeter
- 本设计是基于MCS-51单片机的等精度频率计。输入信号为峰峰值5v的正弦信号，频率测量范围10HZ~100MHZ ，频率测量精度为0.1 。采用1602液晶显示器显示测量结果。信号源由PROTEUS 的虚拟信号发生器产生。-The design is based on the MCS-51 microcontroller, such as frequency meter accuracy. Input signal 5v peak to peak sinusoidal signal, frequ
pinlvji
- 等精度频率计设计，很好的源代码，附上工程文件，在quartus5.0以上版本即可运行。-Design accuracy, such as frequency meter, a good source code, attached to the project document, in the above quartus5.0 to run.
frequency
- 简易数字频率计： 1、频率计的测频范围为1Hz～10KHz，被测量的信号为TTL逻辑的标准方波信号；2、为提高测量精度，采用计数法（≥1000Hz）和测周法（＜1000Hz）相结合的方法进行测量；3、显示器采用6位七段数码管，显示器的无效零应消隐。信号≥1000Hz时不显示小数点，信号＜1000Hz时显示小数，小数点后取两位。 -Simple digital frequency meter: 1, frequency of measurement frequency range of 1
frequency
- 用verilgHDL语言编写的数字频率计代码，并在QUARTUS下实现-Language used verilgHDL Digital Cymometer code, and under QUARTUS
2
- 8位频率计单片机课程设计, 8位频率计单片机课程设计-Frequency of single-chip 8-bit design, the frequency of single-chip 8-bit design, the frequency of single-chip 8 curriculum design
1
- 基于89C51的等精度频率计LCD1602显示 -89C51-based precision frequency meter, etc. The LCD1602 display, such as the 89C51-based precision frequency meter LCD1602 display
5
- 基于AT89S52单片机的频率计,
etester_zcx1002
- 这是一个等精度频率计的VHDL源程序，里面有QuartusII的完整工程文件。-This is a precision frequency meter, such as the VHDL source code, which has a complete project file QuartusII.
E_8051_FTEST_K4X4_new
- 是带５１单片机核的等精度频率计的ＦＰＧＡ设计的部分。用ＶＨＤＬ编的，也有ＶＥＲＩＬＯＧ的。-51 is a single chip with precision, such as the nucleus of the frequency of some of FPGA design. VHDL for use as well as the VERILOG.
pinglvjiFPGA
- 基于等精度原理的频率计verlog代码,被测频率在1HZ到10MHZ误差百分比相同。-Based on the principle of the frequency of such precision code
fre
- 4位数字频率计控制，分为锁存、计数等几个模块-4 digital frequency meter control, is divided into latch, counting a number of modules, etc.
plj
- 基于单片机的频率计设计，对于正在做课程设计的同学会很有帮助哦-Based on the frequency of single-chip design, the courses are designed so students would be helpful oh
szplj
- 数字频率计，可以实现0.1至100000倍数之间的测量。-Digital frequency meter
system
- 基于vhdl的简易数字频率计设计，已经经过调试，可直接使用-Vhdl based on a simple digital frequency meter design, have been debugging, can be directly used
digital_frequency_meter
- 数字频率计详解，从设计思路，设计方案的比较到软件编程框图，极尽详细。-Detailed digital frequency meter, from design ideas, design diagram compared to software programming, highly detailed.