资源列表
排序选择：
Printing to Excel
- 不是我写的，用于将处数据导出为excel格式的文件，挺好用的。- Is not I writes, will use in place the data to derive will be the excel form document, very easy to use.
winio源码
- winio.dll的源码，自己留着没有用，有用的就来找我要好了。-winio.dll source code, own remained not not usefully, useful is asking me to want to be good.
AVR单片机CRC校验码的查表与直接生成.zi
- AVR单片机CRC校验码的查表与直接生成-AVR monolithic integrated circuit CRC verification code Zha Biao with directly produces
网络通信处理器S3C4510B的网口驱动设计.
- 网络通信处理器S3C4510B的网口驱动设计（ARM）- Network correspondence processor S3C4510B net mouth actuation design (ARM)
μC_OS-II在Nios上的移植
- μC_OS-II在Nios上的移植（共同学习ucosII）-uC_OS-II port to Nios (Hope to learn ucosII together )
单片机C语言的精确延时程序设计
- 单片机C语言的精确延时程序设计，很有用的哦- The monolithic integrated circuit C language precise time delay programming, is very useful oh
51定时器初始值计算器
- 51定时器初始值计算器(初学单片机的好工具)-51 timer starting value calculator (begins studies monolithic integrated circuit good tool)
jsp大型数据库论坛系统
- jsp数据库开发实例精粹，对初学者进阶有所帮助-jsp database development example is succinct, enters the step to the beginner to have the help
ContourExtraction
- 轮廓抽取 数字图像处理常用的方法，无压缩密码。 - The outline extracts the digital picture processing commonly used method, non- compression password.
《JSP实用编程实例集锦》
- 动态设置网页背景，中文显示服务端日期，判断服务端时间并显示中文问候- Dynamic establishment homepage background, Chinese demonstration service end date, judgement service end time and demonstration Chinese regards... ...
Music_altera
- 采用Verilog HDL设计，在Altera EP1S10S780C6开发板上实现 选取6MHz为基准频率，演奏的是梁祝乐曲 - Uses Verilog the HDL design, development board realizes in Altera on the EP1S10S780C6 selects 6MHz is the datum frequency, the performance is Liang wishes the music
second&clk
- 开发系统上采用的时钟信号的频率是20MHz，可分别设计计数器对其计数，包括计秒、分、小时、日、周、月以及年等。在每一级上显示输出，这样就构成了一个电子日历和时钟的模型。为了可以随意调整计数值，还应包含设定计数初值的电路