DE2/Altera_Debug_Client/setup.exe
DE2/DE2_Computer_Organization/altera_debug_client_setup.exe
DE2/DE2_Computer_Organization/comporg_lab1.pdf
DE2/DE2_Computer_Organization/comporg_lab2.pdf
DE2/DE2_Computer_Organization/comporg_lab3.pdf
DE2/DE2_Computer_Organization/comporg_lab4.pdf
DE2/DE2_Computer_Organization/comporg_lab5.pdf
DE2/DE2_Computer_Organization/comporg_lab5_design_files.zip
DE2/DE2_Computer_Organization/University_Program_IP_Cores/altera_up_avalon_DE2_pio/class.ptf
DE2/DE2_Computer_Organization/University_Program_IP_Cores/altera_up_avalon_DE2_pio/em_DE2_pio.pl
DE2/DE2_Computer_Organization/University_Program_IP_Cores/altera_up_avalon_DE2_pio/HAL/system.h_component_output.gtf
DE2/DE2_Computer_Organization/University_Program_IP_Cores/altera_up_avalon_DE2_pio/inc/DE2_pio_regs.h
DE2/DE2_Computer_Organization/University_Program_IP_Cores/altera_up_avalon_DE2_pio/sdk/DE2_pio_struct.h
DE2/DE2_Computer_Organization/University_Program_IP_Cores/altera_up_avalon_DE2_pio/sdk/DE2_pio_struct.s
DE2/DE2_Computer_Organization/University_Program_IP_Cores/altera_up_avalon_to_external_bus_bridge/cb_generator.pl
DE2/DE2_Computer_Organization/University_Program_IP_Cores/altera_up_avalon_to_external_bus_bridge/class.ptf
DE2/DE2_Computer_Organization/University_Program_IP_Cores/altera_up_avalon_to_external_bus_bridge/hdl/Altera_UP_Avalon_to_External_Bus_Bridge.v
DE2/DE2_Computer_Organization/University_Program_IP_Cores/altera_up_avalon_to_external_bus_bridge/hdl/Altera_UP_Avalon_to_External_Bus_Bridge.vhd
DE2/DE2_Computer_Organization/University_Program_IP_Cores/ReleaseNotes.txt
DE2/DE2_Computer_Organization/University_Program_IP_Cores/UP_IP_Library.exe
DE2/DE2_System CDROM/Datasheets/Audio CODEC/WM8731_WM8731L.pdf
DE2/DE2_System CDROM/Datasheets/Cyclone_II/cyc2_cii5v1_01.pdf
DE2/DE2_System CDROM/Datasheets/Cyclone_II/see_www.altera.com.txt
DE2/DE2_System CDROM/Datasheets/Ethernet/DM9000A Application Notes Ver 1_20 042205.pdf
DE2/DE2_System CDROM/Datasheets/Ethernet/DM9000A-P03-042105.pdf
DE2/DE2_System CDROM/Datasheets/IrDA/HSDL-3201.pdf
DE2/DE2_System CDROM/Datasheets/LCD/CFAH1602BTMCJP.pdf
DE2/DE2_System CDROM/Datasheets/Memory/61LV25616.pdf
DE2/DE2_System CDROM/Datasheets/Memory/IS42S16400.pdf
DE2/DE2_System CDROM/Datasheets/Memory/MBM29LV800.pdf
DE2/DE2_System CDROM/Datasheets/Memory/S29AL032D_00_A5_E.pdf
DE2/DE2_System CDROM/Datasheets/RS232/max232.pdf
DE2/DE2_System CDROM/Datasheets/TV Decoder/182877477ADV7181B_a.pdf
DE2/DE2_System CDROM/Datasheets/USB/Embedded Programming Guide.pdf
DE2/DE2_System CDROM/Datasheets/USB/ISP1362 DatsSheet.pdf
DE2/DE2_System CDROM/Datasheets/VGA DAC/ADV7123_a.pdf
DE2/DE2_System CDROM/DE2_control_panel/DE2_Control_Panel.exe
DE2/DE2_System CDROM/DE2_control_panel/DE2_USB_API.pof
DE2/DE2_System CDROM/DE2_control_panel/DE2_USB_API.sof
DE2/DE2_System CDROM/DE2_control_panel/FTD2XX.DLL
DE2/DE2_System CDROM/DE2_control_panel/Image_Convert_English.pdf
DE2/DE2_System CDROM/DE2_control_panel/ImgConv.exe
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_verilog/lab10_Verilog.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_verilog/lab1_Verilog.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_verilog/lab2_Verilog.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_verilog/lab3_Verilog.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_verilog/lab4_Verilog.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_verilog/lab5_Verilog.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_verilog/lab6_Verilog.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_verilog/lab7_Verilog.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_verilog/lab8_Verilog.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_verilog/lab9_Verilog.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_vhdl/lab10_VHDL.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_vhdl/lab1_VHDL.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_vhdl/lab2_VHDL.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_vhdl/lab3_VHDL.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_vhdl/lab4_VHDL.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_vhdl/lab5_VHDL.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_vhdl/lab6_VHDL.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_vhdl/lab7_VHDL.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_vhdl/lab8_VHDL.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_labs_vhdl/lab9_VHDL.pdf
DE2/DE2_System CDROM/DE2_lab_exercises/DE2_pin_assignments.csv
DE2/DE2_System CDROM/DE2_pin_assignments.csv
DE2/DE2_System CDROM/DE2_schematics/DE2_schematics.pdf
DE2/DE2_System CDROM/DE2_tutorials/design_files/addersubtractor.v
DE2/DE2_System CDROM/DE2_tutorials/design_files/addersubtractor.vhd
DE2/DE2_System CDROM/DE2_tutorials/design_files/addersubtractor2.v
DE2/DE2_System CDROM/DE2_tutorials/design_files/addersubtractor2.vhd
DE2/DE2_System CDROM/DE2_tutorials/design_files/DE2_pin_assignments.csv
DE2/DE2_System CDROM/DE2_tutorials/tut_DE2_sdram_verilog.pdf
DE2/DE2_System CDROM/DE2_tutorials/tut_DE2_sdram_vhdl.pdf
DE2/DE2_System CDROM/DE2_tutorials/tut_initialDE2.pdf
DE2/DE2_System CDROM/DE2_tutorials/tut_lpms_verilog.pdf
DE2/DE2_Syste