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Tun2CNk2
- FPGA实现DSP的Verilog 示例
ug_ram
- RAM design for FPGA in verilog
i2c
- fpga verilog I2c 和 用以DSP mcbsp程序，测试过了-fpga verilog I2c and for the DSP mcbsp procedures, tested the
write_rd
- 关于VHDL的 关于DSP的 emif-On VHDL on the DSP s EMIF
verilog
- 数字信号处理的FPGA实现(Uwe Meyer-Baese)书中例子的Verilog代码-FPGA implementation of digital signal processing (Uwe Meyer-Baese) book example of Verilog code for
FPFA-DSP
- FPGA可以实现DSP算法，本材料提供了详细的实现方法，对原理与实现给出清晰的思路，是FPGA开发参考的好资料。-FPGA can implement DSP algorithms, this material provides a detailed implementation methods, theory and implementation gives a clear idea is a good reference information on FPGA development.
FPGA
- FPGA应用开发入门与典型实例 代码 FPGA（现场可编程逻辑器件）以其体积小、功耗低、稳定性高等优点被广泛应用于各类电子产品的设计中。本书全面讲解了FPGA系统设计的背景知识、硬件电路设计，硬件描述语言Verilog HDL的基本语法和常用语句，FPGA的开发工具软件的使用，基于FPGA的软核嵌入式系统，FPGA设计的基本原则、技巧、IP核， FPGA在接口设计领域的典型应用，FPGA＋DSP的系统设计与调试，以及数字变焦系统和PCI数据采集系统这两个完整的系统设计案例。 -FPGA
IP
- this a programme about dsp ,it can achieve tcp/ip communication ,the programme is corect ,i wish that you can download it .-this is a programme about dsp ,it can achieve tcp/ip communication ,the programme is corect ,i wish that you can dow
verilog
- 基于DSP和FPGA的CCD 图像采集系统设计与实现-FPGA-based DSP and CCD image acquisition system design and implementation
Digital-Signal-Processing-with-FPGA
- FPGA结合DSP设计，如FIR、IIR滤波器，CORDIC算法,多重采样率信号处理，FFT,有对应的VHDL/Verilog 代码code-FPGA Combines with DSP, FIR 、IIR Digital Filters,CORDIC,FFT,Adaptive Filters，VHDL/Verilog code
mulx
- FPGA verilog乘法器 设计 用FPGA中DSP模块实现-FPGA verilog mulx
Robust and Optimal Control by Kemin Zhou
- Embeded-SCM Develop ARM-PowerPC-ColdFire-MIPS Embeded Linux SCM VxWorks uCOS DSP program Windows CE VHDL-FPGA-Verilog Other Embeded program
dspafpga
- dsp与fpga通信的verilog程序，强烈推荐欢迎参考-dsp and fpga verilog communication program, it is strongly recommended to welcome reference
DSP-with-FPGA(3rd)
- 国外权威著作-数字信号处理的FPGA实现（第三版）的源代码，包括VHDL和verilog两种格式。-Foreign authoritative writings- digital signal processing on FPGA (third edition) of the source code, including VHDL and verilog formats.
exercise3
- 用verilog实现dsp与Fpga接口的同步设计，其功能包括读写操作及四个功能模块，采用两个fifo实现不同时钟域的地址与数据的转换，在quartus ii11.0环境下运行，运行此程序之前需运行将调用fifo。-Dsp using verilog achieve synchronization with Fpga interface design, its features include read and write operations and four functional modul
emif_tt
- 实现dsp与fpga的emif的verilog异步实现，可实现异步读写以及相应功能模块控制，文件中包含仿真后的波形图形以及仿真测试程序，运行环境quartus ii11.0，仿真环境mmodelsim se 6.5d-Achieve dsp and fpga verilog asynchronous implementation of the emif, enabling asynchronous reading and writing as well as the corresponding
verilog
- 把32位的数据转换成8位数据输出，用做fpga把数据传给dsp处理-The 32-bit data into 8 bits of data output
dsp-with-FPGA--verilog_code
- FPGA DSP算法实现代码，做FPGA的非常值得看一看。-dsp with FPGA verilog code
数字信号处理的FPGA实现-第三版-verilog源程序
- 数字信号处理的FPGA实现, 包括了FPGA基础知识，浮点运算，信号处理的FIR FFT等，附录包含源代码(Digital signal processing FPGA implementation, including the basic knowledge of FPGA, floating point operations, signal processing FIR, FFT, etc., the appendix contains the source code)
fpga
- pid算法控制电机运动，实现fpga与dsp的双口RAM通信(PID algorithm to control motor movement, the realization of FPGA and DSP dual port RAM communication)