DDR controller source code and test bench in VerilogHDL. It is very useful to develop DDR project.-DDR controller source code and test bench in VerilogHDL.

DM6467及DM6467T芯片在CCS开发环境下测试DDR通讯是否正常的源代码。-DM6467 and DM6467T test DDR code under CCS.