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文件名称:CPU_16_Beta_1.0

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
  • 上传时间：
    2012-11-16
  • 文件大小：
    2.41mb
  • 已下载：
    0次
  • 提 供 者：
    sig****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

VHDL CPU 16

16位的简易CPU 开发工具为Xilinx-VHDL CPU 16

　a simple CPU in VHDL
相关搜索： VHDL CPU

(系统自动生成,下载前可以参看下载内容)

下载文件列表

CPU_16_Beta_1.0/.CPU_16_Beta_1_0_mem.vhd.swo
CPU_16_Beta_1.0/.CPU_16_Beta_1_0_mem.vhd.swp
CPU_16_Beta_1.0/.lso
CPU_16_Beta_1.0/compxlib.cfg
CPU_16_Beta_1.0/compxlib.log
CPU_16_Beta_1.0/CPU_16_Beta_1.0.ise
CPU_16_Beta_1.0/CPU_16_Beta_1.0.ntrc_log
CPU_16_Beta_1.0/CPU_16_Beta_1.0.restore
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/cst.xbcd
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/version
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/HDProject/HDProject
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/HDProject/HDProject_StrTbl
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/__stored_object_table__
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/PnAutoRun/Scripts/RunOnce_tcl
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/PnAutoRun/Scripts/RunOnce_tcl_StrTbl
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/dpm_project_main/dpm_project_main
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/dpm_project_main/dpm_project_main_StrTbl
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/dpm_project_main/NameMap
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/dpm_project_main/NameMap_StrTbl
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/__stored_objects__
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/__stored_objects___StrTbl
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/__stored_object_table__
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/GuiProjectData
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/GuiProjectData_StrTbl
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/xreport/Gc_RvReportViewer-Current-Module
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/xreport/Gc_RvReportViewer-Current-Module_StrTbl
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/xreport/Gc_RvReportViewer-Module-Data-CPU_16_Beta_1_0_cpu
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/xreport/Gc_RvReportViewer-Module-Data-CPU_16_Beta_1_0_cpu_StrTbl
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/xreport/Gc_RvReportViewer-Module-DataFactory-Default
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__OBJSTORE__/xreport/Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/Autonym/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/bitgen/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/common/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/cpldfit/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/Cs/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/dumpngdio/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/fuse/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/HierarchicalDesign/HDProject/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/HierarchicalDesign/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/hprep6/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/idem/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/map/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/netgen/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/ngc2edif/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/ngcbuild/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/ngdbuild/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/par/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/ProjectNavigator/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/ProjectNavigatorGui/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/runner/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/SrcCtrl/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/STE/bitgen/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/STE/cpldfit/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/STE/map/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/STE/ngdbuild/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/STE/par/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/STE/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/STE/trce/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/STE/XSLTProcess/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/STE/xst/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/taengine/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/trce/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/tsim/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/vhpcomp/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/vlogcomp/regkeys
CPU_16_Beta_1.0/CPU_16_Beta_1.0_xdb/tmp/ise/__REGISTRY__/WebTalk/DesignDataCol

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