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文件名称:VHDLforclock

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  • 上传时间:
    2012-11-16
  • 文件大小:
    4.33mb
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    0次
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介绍说明--下载内容来自于网络,使用问题请自行百度

用VHDL编写电子时钟芯片,具有整点报时,闹钟,秒表功能,调时可按十分与个位分别调时-The preparation of electronic clock chip with VHDL, with the whole point timekeeping, alarm clock, stopwatch function, can be transferred when the transfer is with a bit difference when the
(系统自动生成,下载前可以参看下载内容)

下载文件列表

clocklast/__ISE_repository_clocklast.ise_.lock
clocklast/clocklast.ise
clocklast/toplevel_vhdl.prj
clocklast/toplevel.ngr
clocklast/isim.cmd
clocklast/isimwavedata.xwv
clocklast/toplevel.ngc
clocklast/hour24.vhd
clocklast/c_choice.vhd
clocklast/isim.tmp_save/_1
clocklast/dfd.vhd
clocklast/ddd.vhd
clocklast/min60.vhd
clocklast/min60_stx.prj
clocklast/_xmsgs/xst.xmsgs
clocklast/_xmsgs/fuse.xmsgs
clocklast/_xmsgs/vhpcomp.xmsgs
clocklast/clocklast.ise_ISE_Backup
clocklast/test_min60.vhd
clocklast/test_min60_vhd_stx.prj
clocklast/display_set.vhd
clocklast/c_choice_stx.prj
clocklast/alarm.vhd
clocklast/hour24_stx.prj
clocklast/test_hour24.vhd
clocklast/test_hour24_vhd_stx.prj
clocklast/start_stoop.vhd
clocklast/toplevel.vhd
clocklast/shijian_tb_stx.prj
clocklast/display_set_summary.html
clocklast/display_set_stx.prj
clocklast/test_display_set.vhd
clocklast/test_display_set_vhd_stx.prj
clocklast/test_stopwatch.vhd
clocklast/up_down.vhd
clocklast/stopwatch.vhd
clocklast/stopwatch_stx.prj
clocklast/con_out.vhd
clocklast/sec60.vhd
clocklast/comparator.vhd
clocklast/alarm_stx.prj
clocklast/alarm_min60.vhd
clocklast/alarm_min60_stx.prj
clocklast/test_alarm.vhd
clocklast/mode_con.vhd
clocklast/left_right.vhd
clocklast/mode_con_stx.prj
clocklast/left_right_stx.prj
clocklast/con1_con2_stx.prj
clocklast/counter100.vhd
clocklast/counter100_stx.prj
clocklast/test_mode.vhd
clocklast/start_stoop_stx.prj
clocklast/test_start_stoop_vhd_stx.prj
clocklast/test_alarm_vhd_stx.prj
clocklast/test_counter100.vhd
clocklast/test_stopwatch_vhd_stx.prj
clocklast/test_choice.vhd
clocklast/test_choice_vhd_stx.prj
clocklast/test_start_stoop.vhd
clocklast/toplevel_beh.prj
clocklast/test_counter100_vhd_stx.prj
clocklast/test_tiao.vhd
clocklast/sec60_summary.html
clocklast/sec60.prj
clocklast/xst/work/sub00/vhpl00.vho
clocklast/xst/work/sub00/vhpl01.vho
clocklast/xst/work/sub00/vhpl02.vho
clocklast/xst/work/sub00/vhpl03.vho
clocklast/xst/work/sub00/vhpl04.vho
clocklast/xst/work/sub00/vhpl05.vho
clocklast/xst/work/sub00/vhpl06.vho
clocklast/xst/work/sub00/vhpl07.vho
clocklast/xst/work/sub00/vhpl08.vho
clocklast/xst/work/sub00/vhpl09.vho
clocklast/xst/work/sub00/vhpl10.vho
clocklast/xst/work/sub00/vhpl11.vho
clocklast/xst/work/sub00/vhpl12.vho
clocklast/xst/work/sub00/vhpl13.vho
clocklast/xst/work/sub00/vhpl14.vho
clocklast/xst/work/sub00/vhpl15.vho
clocklast/xst/work/sub00/vhpl16.vho
clocklast/xst/work/sub00/vhpl17.vho
clocklast/xst/work/sub00/vhpl18.vho
clocklast/xst/work/sub00/vhpl19.vho
clocklast/xst/work/sub00/vhpl20.vho
clocklast/xst/work/sub00/vhpl21.vho
clocklast/xst/work/sub00/vhpl22.vho
clocklast/xst/work/sub00/vhpl23.vho
clocklast/xst/work/sub00/vhpl24.vho
clocklast/xst/work/sub00/vhpl25.vho
clocklast/xst/work/sub00/vhpl26.vho
clocklast/xst/work/sub00/vhpl27.vho
clocklast/xst/work/sub00/vhpl28.vho
clocklast/xst/work/sub00/vhpl29.vho
clocklast/xst/work/sub00/vhpl30.vho
clocklast/xst/work/sub00/vhpl31.vho
clocklast/xst/work/hdllib.ref
clocklast/xst/work/hdpdeps.ref
clocklast/xst/dump.xst/sec60.prj/ntrc.scr
clocklast/xst/dump.xst/toplevel.prj/ntrc.scr
clocklast/sec60.xst
clocklast/sec60.cmd_log
clocklast/test_con1_con2.vhd
clocklast/test_mode_vhd_stx.prj
clocklast/test_comparator.vhd
clocklast/test_con1_con2_vhd_stx.prj
clocklast/alarm_summary.html
clocklast/comparator_stx.prj
clocklast/test_comparator_vhd_stx.prj
clocklast/sec60.syr
clocklast/test_tiao_vhd_isim_beh.exe
clocklast/sec60.lso
clocklast/sec60_vhdl.prj
clocklast/test_tiao_vhd_stx.prj
clocklast/up_down_stx.prj
clocklast/transcript
clocklast/clocklast.ntrc_log
clocklast/test_tiao_vhd_beh.prj
clocklast/toplevel_stx.prj
clocklast/stopwatch_summary.html
clocklast/toplevel_summary.html
clocklast/test_alarmset.vhd
clocklast/test_alrmset.vhd
clocklast/test_toplevel.vhd
clocklast/test_toplevel_vhd_stx.prj
clocklast/con_out_stx.prj
clocklast/sec60.ngr
clocklast/test_alrmset_vhd_stx.prj
clocklast/test_toplevel_vhd_beh.prj
clocklast/sec60.ngc
clocklast/toplevel_isim_beh.exe
clocklast/sec60.stx
clocklast/test_con_out.vhd
clocklast/test_con_out_vhd_stx.prj
clocklast/test_sec60.vhd
clocklast/pepExtractor.prj
clocklast/isim/work/counter100/behavioral.h
clocklast/isim/work/counter100/mingw/behavioral.obj
clocklast/isim/work/counter100/xsimbehavioral.cpp
clocklast/isim/work/hdpdeps.ref
clocklast/isim/work/mode_con/behavioral.h
clocklast/isim/work/mode_con/mingw/behavioral.obj
clocklast/isim/work/sub00/vhpl00.vho
clocklast/isim/work/sub00/vhpl01.vho
clocklast/isim/work/sub00/vhpl02.vho
clocklast/isim/work/sub00/vhpl03.vho
clocklast/isim/work/sub00/vhpl04.vho
clocklast/isim/work/sub00/vhpl05.vho
clocklast/isim/work/sub00/vhpl06.vho
clocklast/isim/work/sub00/vhpl07.vho
clocklast/isim/work/sub00/vhpl08.vho
clocklast/isim/work/sub00/vhpl09.vho
clocklast/isim/work/sub00/vhpl10.vho
clocklast/isim/work/sub00/vhpl11.vho
clocklast/isim/work/sub00/vhpl12.vho
clocklast/isim/work/sub00/vhpl13.vho
clocklast/isim/work/sub00/vhpl14.vho
clocklast/isim/work/sub00/vhpl15.vho
clocklast/isim/work/sub00/vhpl16.vho
clocklast/isim/work/sub00/vhpl17.vho
clocklast/isim/work/sub00/vhpl18.vho
clocklast/isim/work/sub00/vhpl19.vho
clocklast/i

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