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文件名称:EDKlab

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [HTML]
  • 上传时间：
    2012-11-16
  • 文件大小：
    11.86mb
  • 已下载：
    0次
  • 提 供 者：
    张****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

这是我这次参加的设计大赛时用的fpga的例程，可能对大家有用-This is my participation in the design competition this time with the fpga' s routine, may be useful for all
(系统自动生成,下载前可以参看下载内容)

下载文件列表

EDKlab/lab1/bitinit.log
EDKlab/lab1/blkdiagram/svg10.dtd
EDKlab/lab1/blkdiagram/system.css
EDKlab/lab1/blkdiagram/system.html
EDKlab/lab1/blkdiagram/system.svg
EDKlab/lab1/clock_generator_0.log
EDKlab/lab1/data/system.ucf
EDKlab/lab1/etc/bitgen.ut
EDKlab/lab1/etc/download.cmd
EDKlab/lab1/etc/fast_runtime.opt
EDKlab/lab1/hdl/clock_generator_0_wrapper.vhd
EDKlab/lab1/hdl/debug_module_wrapper.vhd
EDKlab/lab1/hdl/dlmb_cntlr_wrapper.vhd
EDKlab/lab1/hdl/dlmb_wrapper.vhd
EDKlab/lab1/hdl/elaborate/lmb_bram_elaborate_v1_00_a/hdl/vhdl/lmb_bram_elaborate.vhd
EDKlab/lab1/hdl/ilmb_cntlr_wrapper.vhd
EDKlab/lab1/hdl/ilmb_wrapper.vhd
EDKlab/lab1/hdl/lmb_bram_wrapper.vhd
EDKlab/lab1/hdl/mb_plb_wrapper.vhd
EDKlab/lab1/hdl/microblaze_0_wrapper.vhd
EDKlab/lab1/hdl/micron_ram_util_bus_split_1_wrapper.vhd
EDKlab/lab1/hdl/micron_ram_wrapper.vhd
EDKlab/lab1/hdl/proc_sys_reset_0_wrapper.vhd
EDKlab/lab1/hdl/rs232_port_wrapper.vhd
EDKlab/lab1/hdl/system.vhd
EDKlab/lab1/hdl/system_stub.vhd
EDKlab/lab1/implementation/bitgen.ut
EDKlab/lab1/implementation/cache/cache.cat
EDKlab/lab1/implementation/cache/clock_generator_0_wrapper.ngc
EDKlab/lab1/implementation/cache/debug_module_wrapper.ngc
EDKlab/lab1/implementation/cache/dlmb_cntlr_wrapper.ngc
EDKlab/lab1/implementation/cache/dlmb_wrapper.ngc
EDKlab/lab1/implementation/cache/ilmb_cntlr_wrapper.ngc
EDKlab/lab1/implementation/cache/ilmb_wrapper.ngc
EDKlab/lab1/implementation/cache/lmb_bram_wrapper.ngc
EDKlab/lab1/implementation/cache/mb_plb_wrapper.ngc
EDKlab/lab1/implementation/cache/microblaze_0_wrapper.ngc
EDKlab/lab1/implementation/cache/micron_ram_util_bus_split_1_wrapper.ngc
EDKlab/lab1/implementation/cache/micron_ram_wrapper.ngc
EDKlab/lab1/implementation/cache/proc_sys_reset_0_wrapper.ngc
EDKlab/lab1/implementation/cache/rs232_port_wrapper.ngc
EDKlab/lab1/implementation/clock_generator_0_wrapper.ngc
EDKlab/lab1/implementation/clock_generator_0_wrapper.ngc_xst.xrpt
EDKlab/lab1/implementation/clock_generator_0_wrapper_vhdl.prj
EDKlab/lab1/implementation/debug_module_wrapper.ngc
EDKlab/lab1/implementation/debug_module_wrapper.ngc_xst.xrpt
EDKlab/lab1/implementation/debug_module_wrapper_vhdl.prj
EDKlab/lab1/implementation/dlmb_cntlr_wrapper.ngc
EDKlab/lab1/implementation/dlmb_cntlr_wrapper.ngc_xst.xrpt
EDKlab/lab1/implementation/dlmb_cntlr_wrapper_vhdl.prj
EDKlab/lab1/implementation/dlmb_wrapper.ngc
EDKlab/lab1/implementation/dlmb_wrapper.ngc_xst.xrpt
EDKlab/lab1/implementation/dlmb_wrapper_vhdl.prj
EDKlab/lab1/implementation/download.bit
EDKlab/lab1/implementation/fpga.flw
EDKlab/lab1/implementation/ilmb_cntlr_wrapper.ngc
EDKlab/lab1/implementation/ilmb_cntlr_wrapper.ngc_xst.xrpt
EDKlab/lab1/implementation/ilmb_cntlr_wrapper_vhdl.prj
EDKlab/lab1/implementation/ilmb_wrapper.ngc
EDKlab/lab1/implementation/ilmb_wrapper.ngc_xst.xrpt
EDKlab/lab1/implementation/ilmb_wrapper_vhdl.prj
EDKlab/lab1/implementation/lmb_bram_wrapper.ngc
EDKlab/lab1/implementation/lmb_bram_wrapper.ngc_xst.xrpt
EDKlab/lab1/implementation/lmb_bram_wrapper_vhdl.prj
EDKlab/lab1/implementation/mb_plb_wrapper.ngc
EDKlab/lab1/implementation/mb_plb_wrapper.ngc_xst.xrpt
EDKlab/lab1/implementation/mb_plb_wrapper_vhdl.prj
EDKlab/lab1/implementation/microblaze_0_wrapper.ngc
EDKlab/lab1/implementation/microblaze_0_wrapper.ngc_xst.xrpt
EDKlab/lab1/implementation/microblaze_0_wrapper_vhdl.prj
EDKlab/lab1/implementation/micron_ram_util_bus_split_1_wrapper.ngc
EDKlab/lab1/implementation/micron_ram_util_bus_split_1_wrapper.ngc_xst.xrpt
EDKlab/lab1/implementation/micron_ram_util_bus_split_1_wrapper_vhdl.prj
EDKlab/lab1/implementation/micron_ram_wrapper.ngc
EDKlab/lab1/implementation/micron_ram_wrapper.ngc_xst.xrpt
EDKlab/lab1/implementation/micron_ram_wrapper_vhdl.prj
EDKlab/lab1/implementation/netlist.lst
EDKlab/lab1/implementation/proc_sys_reset_0_wrapper.ngc
EDKlab/lab1/implementation/proc_sys_reset_0_wrapper.ngc_xst.xrpt
EDKlab/lab1/implementation/proc_sys_reset_0_wrapper_vhdl.prj
EDKlab/lab1/implementation/rs232_port_wrapper/rs232_port_wrapper.ngc
EDKlab/lab1/implementation/rs232_port_wrapper/xlnx_auto_0.ise
EDKlab/lab1/implementation/rs232_port_wrapper.blc
EDKlab/lab1/implementation/rs232_port_wrapper.ngc
EDKlab/lab1/implementation/rs232_port_wrapper.ngc_xst.xrpt
EDKlab/lab1/implementation/rs232_port_wrapper_vhdl.prj
EDKlab/lab1/implementation/system.bgn
EDKlab/lab1/implementation/system.bit
EDKlab/lab1/implementation/system.bld
EDKlab/lab1/implementation/system.bmm
EDKlab/lab1/implementation/system.drc
EDKlab/lab1/implementation/system.ncd
EDKlab/lab1/implementation/system.ngc
EDKlab/lab1/implementation/system.ngc_xst.xrpt
EDKlab/lab1/implementation/system.ngd
EDKlab/lab1/implementation/system.pad
EDKlab/lab1/implementation/system.par
EDKlab/lab1/implementation/system.pcf
EDKlab/lab1/implementation/system.ptwx
EDKlab/lab1/implementation/system.twr
EDKlab/lab1/implementation/system.twx
EDKlab/lab1/implementation/system.ucf
EDKlab/lab1/implementation/system.unroutes
EDKlab/lab1/implementation/system.xpi
EDKlab/lab1/implementation/system_bd.bmm
EDKlab/lab1/implementation/system_map.map
EDKlab/lab1/implementation/system_map.mrp
EDKlab/lab1/impleme

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