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文件名称:cpu-design

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [HTML]
  • 上传时间：
    2012-11-16
  • 文件大小：
    2.75mb
  • 已下载：
    0次
  • 提 供 者：
    l****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

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VHDL设计的一个可综合的精简指令集的CPU，加上外围模块，类似与51单片机，当然还缺少很多功能，只是雏形，供大家交流-VHDL design of an integrated RISC CPU, coupled with external modules, exhausted and 51 single-chip, of course, the lack of many features, but prototype for all to share
(系统自动生成,下载前可以参看下载内容)

下载文件列表

cpu design/accumulator.bsf
cpu design/accumulator.vhd
cpu design/accumulator.vhd.bak
cpu design/addr.bsf
cpu design/addr.vhd
cpu design/addr.vhd.bak
cpu design/addr_decode.bsf
cpu design/addr_decode.vhd
cpu design/addr_decode.vhd.bak
cpu design/alu.bsf
cpu design/alu.vhd
cpu design/alu.vhd.bak
cpu design/clkchange.bsf
cpu design/clkchange.vhd
cpu design/clkchange.vhd.bak
cpu design/clk_gen.bsf
cpu design/clk_gen.vhd
cpu design/clk_gen.vhd.bak
cpu design/counter.bsf
cpu design/counter.vhd
cpu design/counter.vhd.bak
cpu design/cpu.asm.rpt
cpu design/cpu.bdf
cpu design/cpu.done
cpu design/cpu.dpf
cpu design/cpu.fit.rpt
cpu design/cpu.fit.smsg
cpu design/cpu.fit.summary
cpu design/cpu.flow.rpt
cpu design/cpu.map.rpt
cpu design/cpu.map.summary
cpu design/cpu.pin
cpu design/cpu.pof
cpu design/cpu.qpf
cpu design/cpu.qsf
cpu design/cpu.qws
cpu design/cpu.sim.rpt
cpu design/cpu.sof
cpu design/cpu.tan.rpt
cpu design/cpu.tan.summary
cpu design/cpu.vwf
cpu design/cpumain.bsf
cpu design/cpumain.vhd
cpu design/cpumain.vhd.bak
cpu design/cpu_assignment_defaults.qdf
cpu design/datactl.bsf
cpu design/datactl.vhd
cpu design/datactl.vhd.bak
cpu design/db/cpu.(0).cnf.cdb
cpu design/db/cpu.(0).cnf.hdb
cpu design/db/cpu.(1).cnf.cdb
cpu design/db/cpu.(1).cnf.hdb
cpu design/db/cpu.(10).cnf.cdb
cpu design/db/cpu.(10).cnf.hdb
cpu design/db/cpu.(11).cnf.cdb
cpu design/db/cpu.(11).cnf.hdb
cpu design/db/cpu.(12).cnf.cdb
cpu design/db/cpu.(12).cnf.hdb
cpu design/db/cpu.(13).cnf.cdb
cpu design/db/cpu.(13).cnf.hdb
cpu design/db/cpu.(14).cnf.cdb
cpu design/db/cpu.(14).cnf.hdb
cpu design/db/cpu.(2).cnf.cdb
cpu design/db/cpu.(2).cnf.hdb
cpu design/db/cpu.(3).cnf.cdb
cpu design/db/cpu.(3).cnf.hdb
cpu design/db/cpu.(4).cnf.cdb
cpu design/db/cpu.(4).cnf.hdb
cpu design/db/cpu.(5).cnf.cdb
cpu design/db/cpu.(5).cnf.hdb
cpu design/db/cpu.(6).cnf.cdb
cpu design/db/cpu.(6).cnf.hdb
cpu design/db/cpu.(7).cnf.cdb
cpu design/db/cpu.(7).cnf.hdb
cpu design/db/cpu.(8).cnf.cdb
cpu design/db/cpu.(8).cnf.hdb
cpu design/db/cpu.(9).cnf.cdb
cpu design/db/cpu.(9).cnf.hdb
cpu design/db/cpu.asm.qmsg
cpu design/db/cpu.asm.rdb
cpu design/db/cpu.cbx.xml
cpu design/db/cpu.cmp.cdb
cpu design/db/cpu.cmp.hdb
cpu design/db/cpu.cmp.kpt
cpu design/db/cpu.cmp.logdb
cpu design/db/cpu.cmp.rdb
cpu design/db/cpu.cmp.tdb
cpu design/db/cpu.cmp0.ddb
cpu design/db/cpu.db_info
cpu design/db/cpu.eco.cdb
cpu design/db/cpu.eds_overflow
cpu design/db/cpu.fit.qmsg
cpu design/db/cpu.hier_info
cpu design/db/cpu.hif
cpu design/db/cpu.lpc.html
cpu design/db/cpu.lpc.rdb
cpu design/db/cpu.lpc.txt
cpu design/db/cpu.map.cdb
cpu design/db/cpu.map.hdb
cpu design/db/cpu.map.logdb
cpu design/db/cpu.map.qmsg
cpu design/db/cpu.pre_map.cdb
cpu design/db/cpu.pre_map.hdb
cpu design/db/cpu.ram0_ram_1d0cf.hdl.mif
cpu design/db/cpu.rtlv.hdb
cpu design/db/cpu.rtlv_sg.cdb
cpu design/db/cpu.rtlv_sg_swap.cdb
cpu design/db/cpu.sgdiff.cdb
cpu design/db/cpu.sgdiff.hdb
cpu design/db/cpu.sim.cvwf
cpu design/db/cpu.sim.hdb
cpu design/db/cpu.sim.qmsg
cpu design/db/cpu.sim.rdb
cpu design/db/cpu.sld_design_entry.sci
cpu design/db/cpu.sld_design_entry_dsc.sci
cpu design/db/cpu.smart_action.txt
cpu design/db/cpu.smp_dump.txt
cpu design/db/cpu.syn_hier_info
cpu design/db/cpu.tan.qmsg
cpu design/db/cpu.tis_db_list.ddb
cpu design/db/cpu.tmw_info
cpu design/db/cpu_global_asgn_op.abo
cpu design/db/logic_util_heursitic.dat
cpu design/db/prev_cmp_cpu.asm.qmsg
cpu design/db/prev_cmp_cpu.fit.qmsg
cpu design/db/prev_cmp_cpu.map.qmsg
cpu design/db/prev_cmp_cpu.qmsg
cpu design/db/prev_cmp_cpu.sim.qmsg
cpu design/db/prev_cmp_cpu.tan.qmsg
cpu design/db/wed.wsf
cpu design/incremental_db/compiled_partitions/cpu.root_partition.map.kpt
cpu design/incremental_db/README
cpu design/instruction_register.bsf
cpu design/instruction_register.vhd
cpu design/instruction_register.vhd.bak
cpu design/machine.bsf
cpu design/machine.vhd
cpu design/machine.vhd.bak
cpu design/machinectl.bsf
cpu design/machinectl.vhd
cpu design/machinectl.vhd.bak
cpu design/ram.bsf
cpu design/ram.vhd
cpu design/ram.vhd.bak
cpu design/register.vhd.bak
cpu design/rom.bsf
cpu design/rom.vhd
cpu design/rom.vhd.bak
cpu design/serv_req_info.txt
cpu design/incremental_db/compiled_partitions
cpu design/db
cpu design/incremental_db
cpu design

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